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Difference between revisions of "intel/core m/m5-6y57"
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− | {{intel title|Core | + | {{intel title|Core m5-6Y57}} |
− | {{ | + | {{chip |
− | | name | + | |name=Core m5-6Y57 |
− | | | + | |image=skylake y (front).png |
− | + | |image size=250px | |
− | | image size | + | |designer=Intel |
− | + | |manufacturer=Intel | |
− | | designer | + | |model number=m5-6Y57 |
− | | manufacturer | + | |part number=HE8066201922876 |
− | | model number | + | |s-spec=SR2EG |
− | | part number | + | |market=Mobile |
− | | market | + | |first announced=September 1, 2015 |
− | | first announced | + | |first launched=September 27, 2015 |
− | | first launched | + | |release price=$281 |
− | + | |family=Core m5 | |
− | + | |series=m-6Y | |
− | | release price | + | |locked=Yes |
− | + | |frequency=1100 MHz | |
− | | family | + | |turbo frequency1=2,800 MHz |
− | | series | + | |turbo frequency2=2,400 MHz |
− | | locked | + | |turbo frequency=Yes |
− | | frequency | + | |bus type=DMI 3.0 |
− | | turbo | + | |clock multiplier=11 |
− | | turbo | + | |isa=x86-64 |
− | | turbo | + | |isa family=x86 |
− | | bus type | + | |microarch=Skylake |
− | + | |platform=Skylake | |
− | + | |core name=Skylake Y | |
− | | clock multiplier | + | |core family=6 |
− | | | + | |core model=78 |
− | + | |core stepping=D1 | |
− | + | |process=14 nm | |
− | + | |transistors=1,750,000,000 | |
− | + | |technology=CMOS | |
− | | isa family | + | |die area=98.57 mm² |
− | + | |die length=10.3 mm | |
− | | microarch | + | |die width=9.57 mm |
− | | platform | + | |mcp=Yes |
− | + | |die count=2 | |
− | | core name | + | |word size=64 bit |
− | | core family | + | |core count=2 |
− | | core model | + | |thread count=4 |
− | | core stepping | + | |max cpus=1 |
− | | process | + | |max memory=16 GiB |
− | | transistors | + | |sdp=3 W |
− | | technology | + | |tdp=4.5 W |
− | | die area | + | |ctdp down=3.5 W |
− | | die width | + | |ctdp down frequency=600 MHz |
− | | die | + | |ctdp up=7 W |
− | | word size | + | |ctdp up frequency=1500 MHz |
− | | core count | + | |tjunc min=5 °C |
− | | thread count | + | |tjunc max=100 °C |
− | | max cpus | + | |package name 1=intel,fcbga_1515 |
− | | max memory | ||
− | |||
− | |||
− | |||
− | |||
− | | sdp | ||
− | | tdp | ||
− | | ctdp down | ||
− | | ctdp down frequency = 600 MHz | ||
− | | ctdp up | ||
− | | ctdp up frequency | ||
− | | tjunc min | ||
− | | tjunc max | ||
− | |||
− | | package | ||
}} | }} | ||
'''Core M5-6Y57''' is an ultra-low power {{arch|64}} [[dual-core]] [[x86]] microprocessor introduced by [[Intel]] in late 2015. This MPU operates at 1.1 GHz with a max turbo frequency of 2.8 GHz. This chip, which is manufactured on a [[14 nm process]], is based on the {{intel|Skylake}} microarchitecture. The Core M5-6Y57 incorporates Intel's {{intel|HD Graphics 515}} Gen9 GPU clocked at 300 MHz with turbo frequency of 900 MHz. | '''Core M5-6Y57''' is an ultra-low power {{arch|64}} [[dual-core]] [[x86]] microprocessor introduced by [[Intel]] in late 2015. This MPU operates at 1.1 GHz with a max turbo frequency of 2.8 GHz. This chip, which is manufactured on a [[14 nm process]], is based on the {{intel|Skylake}} microarchitecture. The Core M5-6Y57 incorporates Intel's {{intel|HD Graphics 515}} Gen9 GPU clocked at 300 MHz with turbo frequency of 900 MHz. | ||
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== Memory controller == | == Memory controller == | ||
{{memory controller | {{memory controller | ||
− | |type=LPDDR3-1866 | + | |type=LPDDR3-1866 |
+ | |type 2=DDR3L-1600 | ||
|ecc=No | |ecc=No | ||
|max mem=16 GiB | |max mem=16 GiB | ||
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== Features == | == Features == | ||
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | nx | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |mmx=Yes |
− | | | + | |emmx=Yes |
− | | | + | |sse=Yes |
− | | | + | |sse2=Yes |
− | | | + | |sse3=Yes |
− | | | + | |ssse3=Yes |
− | | | + | |sse41=Yes |
− | | | + | |sse42=Yes |
− | | | + | |sse4a=No |
− | | | + | |avx=Yes |
− | | | + | |avx2=Yes |
− | | | + | |
− | | | + | |abm=Yes |
− | | | + | |tbm=No |
− | | | + | |bmi1=Yes |
− | | | + | |bmi2=Yes |
− | | | + | |fma3=No |
− | | | + | |fma4=No |
− | | | + | |aes=Yes |
− | | | + | |rdrand=Yes |
− | | | + | |sha=No |
− | | mpx | + | |xop=No |
− | | sgx | + | |adx=Yes |
− | | | + | |clmul=Yes |
− | | | + | |f16c=Yes |
− | | | + | |tbt1=No |
− | | | + | |tbt2=Yes |
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=Yes | ||
+ | |fastmem=No | ||
+ | |isrt=Yes | ||
+ | |sba=No | ||
+ | |mwt=Yes | ||
+ | |sipp=Yes | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=Yes | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=Yes | ||
+ | |sgx=Yes | ||
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} | ||
== Drivers == | == Drivers == | ||
* [[drivers url::https://downloadcenter.intel.com/product/94026|Drivers]] | * [[drivers url::https://downloadcenter.intel.com/product/94026|Drivers]] |
Latest revision as of 16:58, 28 August 2018
Edit Values | |
Core m5-6Y57 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | m5-6Y57 |
Part Number | HE8066201922876 |
S-Spec | SR2EG |
Market | Mobile |
Introduction | September 1, 2015 (announced) September 27, 2015 (launched) |
Release Price | $281 |
Shop | Amazon |
General Specs | |
Family | Core m5 |
Series | m-6Y |
Locked | Yes |
Frequency | 1100 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 2,800 MHz (1 core), 2,400 MHz (2 cores) |
Bus type | DMI 3.0 |
Clock multiplier | 11 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake |
Platform | Skylake |
Core Name | Skylake Y |
Core Family | 6 |
Core Model | 78 |
Core Stepping | D1 |
Process | 14 nm |
Transistors | 1,750,000,000 |
Technology | CMOS |
Die | 98.57 mm² 10.3 mm × 9.57 mm |
MCP | Yes (2 dies) |
Word Size | 64 bit |
Cores | 2 |
Threads | 4 |
Max Memory | 16 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
SDP | 3 W |
TDP | 4.5 W |
cTDP down | 3.5 W |
cTDP down frequency | 600 MHz |
cTDP up | 7 W |
cTDP up frequency | 1500 MHz |
Tjunction | 5 °C – 100 °C |
Packaging | |
Package | FCBGA-1515 (BGA) |
Dimension | 20 mm × 16.5 mm × 0.5 mm |
Pitch | 0.4 mm |
Contacts | 1515 |
Core M5-6Y57 is an ultra-low power 64-bit dual-core x86 microprocessor introduced by Intel in late 2015. This MPU operates at 1.1 GHz with a max turbo frequency of 2.8 GHz. This chip, which is manufactured on a 14 nm process, is based on the Skylake microarchitecture. The Core M5-6Y57 incorporates Intel's HD Graphics 515 Gen9 GPU clocked at 300 MHz with turbo frequency of 900 MHz.
Cache[edit]
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
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Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
VP9 | ✘ | 0 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Drivers[edit]
Facts about "Core m5-6Y57 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core m5-6Y57 - Intel#io + |
device id | 0x191E + |
drivers url | https://downloadcenter.intel.com/product/94026 + |
has ecc memory support | false + |
integrated gpu | HD Graphics 515 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 900 MHz (0.9 GHz, 900,000 KHz) + |
integrated gpu max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
max memory bandwidth | 27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 10 + |
supported memory type | LPDDR3-1866 + |