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{{title|Macro-Operation (MOP)}} | {{title|Macro-Operation (MOP)}} | ||
'''Macro-Operation''' ('''Macro-Ops''' or '''MOP''') is a more complex version of a [[micro-operation]] as handled by the [[microprocessor]]. Macro-Operations have a number of slightly different meanings, depending on the [[microarchitecture]] and designers that's being discussed. | '''Macro-Operation''' ('''Macro-Ops''' or '''MOP''') is a more complex version of a [[micro-operation]] as handled by the [[microprocessor]]. Macro-Operations have a number of slightly different meanings, depending on the [[microarchitecture]] and designers that's being discussed. | ||
| + | |||
| + | == Overview == | ||
| + | Although the definition varies by designer, MOPs almost always refer to operations that are considered more complex than the basic operations that are executed by the execution units. In general, they refer to more complex operations that are often decomposed into one or more very simple [[micro-operations]] further down the pipeline. | ||
| + | |||
| + | == Nomenclature == | ||
| + | MOPs have a number of common meanings among chip designers: | ||
| + | |||
| + | * [[Intel]] refers to the variable-length [[x86]] instructions as ''macro-ops''. In their context, macro-operations are variable length and can be quite complex capable of performing multiple memory and arithmetic operations at once. In AMD's context, those are refered to as actual "[[x86-64|AMD64]] instructions". | ||
| + | * [[AMD]] refers to the a more simplified fixed-length operation as ''macro-ops'' (sometimes also ''Complex-Op'' or ''COPs''). In their context, macro-operations are a fixed-length operation that may be composed of a memory operation and an arithmetic operation. For example, a single MOP can perform a read, modify, and write operation. Another way of describing MOPs is [[x86]] instructions that have undergone a number of transformations to make them fit into a more strict, but still complex, format. In Intel's context, no such concept exist. | ||
| + | * [[ARM Holdings|ARM]] refers to relatively more complex instructions that get decomposed into one or more [[µOPs]]. Those MOPS get cracked into smaller µOPs later on in the pipeline. Note that in legacy ARM cores, MOPs used to refer to complex instructions that required a number of iterations through the pipeline (''multi-cycle instructions''). | ||
| + | |||
| + | == See also == | ||
| + | * [[macro-operation fusion]] | ||
| + | * [[micro-operation]] | ||
Latest revision as of 17:46, 25 May 2019
Macro-Operation (Macro-Ops or MOP) is a more complex version of a micro-operation as handled by the microprocessor. Macro-Operations have a number of slightly different meanings, depending on the microarchitecture and designers that's being discussed.
Overview[edit]
Although the definition varies by designer, MOPs almost always refer to operations that are considered more complex than the basic operations that are executed by the execution units. In general, they refer to more complex operations that are often decomposed into one or more very simple micro-operations further down the pipeline.
Nomenclature[edit]
MOPs have a number of common meanings among chip designers:
- Intel refers to the variable-length x86 instructions as macro-ops. In their context, macro-operations are variable length and can be quite complex capable of performing multiple memory and arithmetic operations at once. In AMD's context, those are refered to as actual "AMD64 instructions".
- AMD refers to the a more simplified fixed-length operation as macro-ops (sometimes also Complex-Op or COPs). In their context, macro-operations are a fixed-length operation that may be composed of a memory operation and an arithmetic operation. For example, a single MOP can perform a read, modify, and write operation. Another way of describing MOPs is x86 instructions that have undergone a number of transformations to make them fit into a more strict, but still complex, format. In Intel's context, no such concept exist.
- ARM refers to relatively more complex instructions that get decomposed into one or more µOPs. Those MOPS get cracked into smaller µOPs later on in the pipeline. Note that in legacy ARM cores, MOPs used to refer to complex instructions that required a number of iterations through the pipeline (multi-cycle instructions).