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{{intel title|Core M3-7Y32}} | {{intel title|Core M3-7Y32}} | ||
| − | {{ | + | {{chip |
| − | | name | + | |name=Core M3-7Y32 |
| − | | | + | |image=kaby lake y (front).png |
| − | + | |image size=250px | |
| − | | image size | + | |designer=Intel |
| − | + | |manufacturer=Intel | |
| − | | designer | + | |model number=M3-7Y32 |
| − | | manufacturer | + | |part number=HE8067702739830 |
| − | | model number | + | |s-spec=SR346 |
| − | | part number | + | |market=Mobile |
| − | + | |first launched=April 10, 2017 | |
| − | + | |release price=$281.00 | |
| − | | s-spec | + | |family=Core M3 |
| − | + | |series=m3-7Y | |
| − | | market | + | |locked=Yes |
| − | + | |frequency=1,100 MHz | |
| − | | first launched | + | |turbo frequency1=3,000 MHz |
| − | + | |turbo frequency=Yes | |
| − | + | |bus type=OPI | |
| − | | release price | + | |bus rate=4 GT/s |
| − | + | |clock multiplier=11 | |
| − | | family | + | |isa=x86-64 |
| − | | series | + | |isa family=x86 |
| − | | locked | + | |microarch=Kaby Lake |
| − | | frequency | + | |platform=Kaby Lake |
| − | + | |core name=Kaby Lake Y | |
| − | | turbo frequency1 | + | |core family=6 |
| − | | turbo | + | |core model=142 |
| − | + | |core stepping=H0 | |
| − | + | |process=14 nm | |
| − | | bus type | + | |technology=CMOS |
| − | + | |word size=64 bit | |
| − | | bus rate | + | |core count=2 |
| − | + | |thread count=4 | |
| − | | clock multiplier | + | |max cpus=1 |
| − | + | |max memory=16 GiB | |
| − | + | |v core min=0.55 V | |
| − | | isa | + | |v core max=1.52 V |
| − | | isa | + | |tdp=4.5 W |
| − | | microarch | + | |ctdp down=3.75 W |
| − | | platform | + | |ctdp down frequency=600 MHz |
| − | + | |ctdp up=7 W | |
| − | | core name | + | |ctdp up frequency=1,600 MHz |
| − | | core family | + | |tjunc min=0 °C |
| − | | core model | + | |tjunc max=100 °C |
| − | | core stepping | + | |tstorage min=-25 °C |
| − | + | |tstorage max=125 °C | |
| − | | process | + | |package name 1=intel,fcbga_1515 |
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| − | | v core min | ||
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| − | | tdp | ||
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| − | | ctdp down | ||
| − | | ctdp down frequency = 600 MHz | ||
| − | | ctdp up | ||
| − | | ctdp up frequency | ||
| − | | tjunc min | ||
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}} | }} | ||
| − | '''Core M3-7Y32''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in | + | '''Core M3-7Y32''' is a {{arch|64}} [[dual-core]] low-end performance ultra-low power [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The M3-7Y32 operates at 1.1 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 3 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 900 MHz. |
This specific model has a configurable TDP-down of 3.75 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz. | This specific model has a configurable TDP-down of 3.75 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz. | ||
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|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No | ||
Latest revision as of 22:39, 23 September 2025
| Edit Values | |
| Core M3-7Y32 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | M3-7Y32 |
| Part Number | HE8067702739830 |
| S-Spec | SR346 |
| Market | Mobile |
| Introduction | April 10, 2017 (launched) |
| Release Price | $281.00 |
| Shop | Amazon |
| General Specs | |
| Family | Core M3 |
| Series | m3-7Y |
| Locked | Yes |
| Frequency | 1,100 MHz |
| Turbo Frequency | Yes |
| Turbo Frequency | 3,000 MHz (1 core) |
| Bus type | OPI |
| Bus rate | 4 GT/s |
| Clock multiplier | 11 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Kaby Lake |
| Platform | Kaby Lake |
| Core Name | Kaby Lake Y |
| Core Family | 6 |
| Core Model | 142 |
| Core Stepping | H0 |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 2 |
| Threads | 4 |
| Max Memory | 16 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Vcore | 0.55 V-1.52 V |
| TDP | 4.5 W |
| cTDP down | 3.75 W |
| cTDP down frequency | 600 MHz |
| cTDP up | 7 W |
| cTDP up frequency | 1,600 MHz |
| Tjunction | 0 °C – 100 °C |
| Tstorage | -25 °C – 125 °C |
| Packaging | |
| Package | FCBGA-1515 (BGA) |
| Dimension | 20 mm × 16.5 mm × 0.5 mm |
| Pitch | 0.4 mm |
| Contacts | 1515 |
Core M3-7Y32 is a 64-bit dual-core low-end performance ultra-low power x86 mobile microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The M3-7Y32 operates at 1.1 GHz with a TDP of 4.5 W supporting a Turbo Boost frequency of 3 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's HD Graphics 615 IGP operating at 300 MHz with a burst frequency of 900 MHz.
This specific model has a configurable TDP-down of 3.75 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz.
The Core M3-7Y32 superceeds the M3-7Y30 which was released in August 2016, offering 100 MHz higher base clock and 400 MHz higher turbo frequency for the exact same price.
Cache[edit]
- Main article: Kaby Lake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options
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Graphics[edit]
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Integrated Graphics Information
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| [Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
|---|---|---|---|---|---|---|---|
| Codec | Encode | Decode | |||||
| Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
| MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
| MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
| JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
| HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
| VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
| VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
| VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) | ||
Features[edit]
[Edit/Modify Supported Features]
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core M3-7Y32 - Intel#io + |
| base frequency | 1,100 MHz (1.1 GHz, 1,100,000 kHz) + |
| bus rate | 4,000 MT/s (4 GT/s, 4,000,000 kT/s) + |
| bus type | OPI + |
| clock multiplier | 11 + |
| core count | 2 + |
| core family | 6 + |
| core model | 142 + |
| core name | Kaby Lake Y + |
| core stepping | H0 + |
| core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
| core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
| designer | Intel + |
| device id | 0x591E + |
| family | Core M3 + |
| first launched | April 10, 2017 + |
| full page name | intel/core m/m3-7y32 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has ecc memory support | false + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology + and My WiFi Technology + |
| has intel enhanced speedstep technology | true + |
| has intel flex memory access support | true + |
| has intel my wifi technology support | true + |
| has intel secure key technology | true + |
| has intel smart response technology support | true + |
| has intel speed shift technology | true + |
| has intel supervisor mode execution protection | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| integrated gpu | HD Graphics 615 + |
| integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
| integrated gpu designer | Intel + |
| integrated gpu execution units | 24 + |
| integrated gpu max frequency | 900 MHz (0.9 GHz, 900,000 KHz) + |
| integrated gpu max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ description | 12-way set associative + |
| l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
| ldate | April 10, 2017 + |
| main image | |
| manufacturer | Intel + |
| market segment | Mobile + |
| max cpu count | 1 + |
| max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
| max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
| max memory bandwidth | 27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
| max memory channels | 2 + |
| max pcie lanes | 10 + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | Kaby Lake + |
| min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
| model number | M3-7Y32 + |
| name | Core M3-7Y32 + |
| package | FCBGA-1515 + |
| part number | HE8067702739830 + |
| platform | Kaby Lake + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) + |
| s-spec | SR346 + |
| series | m3-7Y + |
| smp max ways | 1 + |
| supported memory type | DDR3L-1600 + and LPDDR3-1866 + |
| tdp | 4.5 W (4,500 mW, 0.00603 hp, 0.0045 kW) + |
| tdp down | 3.75 W (3,750 mW, 0.00503 hp, 0.00375 kW) + |
| tdp down frequency | 600 MHz (0.6 GHz, 600,000 kHz) + |
| tdp up | 7 W (7,000 mW, 0.00939 hp, 0.007 kW) + |
| tdp up frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
| technology | CMOS + |
| thread count | 4 + |
| turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |
| x86/has memory protection extensions | true + |
| x86/has software guard extensions | true + |