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Difference between revisions of "intel/core i5/i5-7y54"
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{{intel title|Core i5-7Y54}} | {{intel title|Core i5-7Y54}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Core i5-7Y54 |
− | | | + | |image=kaby lake y (front).png |
− | + | |image size=250px | |
− | | image size | + | |designer=Intel |
− | + | |manufacturer=Intel | |
− | | designer | + | |model number=i5-7Y54 |
− | | manufacturer | + | |part number=HE8067702739826 |
− | | model number | + | |s-spec=SR2ZX |
− | | part number | + | |s-spec 2=SR345 |
− | | | + | |market=Mobile |
− | + | |first announced=August 30, 2016 | |
− | | s-spec | + | |first launched=August 30, 2016 |
− | | market | + | |release price=$281.00 |
− | | first announced | + | |family=Core i5 |
− | | first launched | + | |series=i5-7Y |
− | + | |locked=Yes | |
− | + | |frequency=1,200 MHz | |
− | | release price | + | |turbo frequency1=3,200 MHz |
− | + | |turbo frequency=Yes | |
− | | family | + | |bus type=OPI |
− | | series | + | |bus rate=4 GT/s |
− | | locked | + | |clock multiplier=12 |
− | | frequency | + | |isa=x86-64 |
− | + | |isa family=x86 | |
− | | turbo frequency1 | + | |microarch=Kaby Lake |
− | | turbo | + | |platform=Kaby Lake |
− | + | |core name=Kaby Lake Y | |
− | + | |core family=6 | |
− | | bus type | + | |core model=142 |
− | + | |core stepping=H0 | |
− | | bus rate | + | |process=14 nm |
− | + | |technology=CMOS | |
− | | clock multiplier | + | |word size=64 bit |
− | + | |core count=2 | |
− | + | |thread count=4 | |
− | | isa | + | |max cpus=1 |
− | | isa | + | |max memory=16 GiB |
− | | microarch | + | |v core min=0.55 V |
− | | platform | + | |v core max=1.52 V |
− | + | |tdp=4.5 W | |
− | | core name | + | |ctdp down=3.5 W |
− | | core family | + | |ctdp down frequency=600 MHz |
− | | core model | + | |ctdp up=7 W |
− | | core stepping | + | |ctdp up frequency=1,600 MHz |
− | + | |tjunc min=0 °C | |
− | | process | + | |tjunc max=100 °C |
− | + | |tstorage min=-25 °C | |
− | | technology | + | |tstorage max=125 °C |
− | + | |package name 1=intel,fcbga_1515 | |
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− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
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− | | v core min | ||
− | | v core max | ||
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− | | tdp | ||
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− | | ctdp down | ||
− | | ctdp down frequency = 600 MHz | ||
− | | ctdp up | ||
− | | ctdp up frequency | ||
− | | tjunc min | ||
− | | tjunc max | ||
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− | | tstorage min | ||
− | | tstorage max | ||
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− | | package | ||
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}} | }} | ||
− | '''Core i5-7Y54''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in | + | '''Core i5-7Y54''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 950 MHz. |
+ | This specific model has a configurable TDP-down of 3.5 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz. | ||
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} | {{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} | ||
Line 97: | Line 61: | ||
|l1i break=2x32 KiB | |l1i break=2x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |||
|l1d cache=64 KiB | |l1d cache=64 KiB | ||
|l1d break=2x32 KiB | |l1d break=2x32 KiB | ||
Line 179: | Line 142: | ||
| intel clear video hd = Yes | | intel clear video hd = Yes | ||
}} | }} | ||
+ | {{kaby lake hardware accelerated video table|col=1}} | ||
== Features == | == Features == | ||
Line 203: | Line 167: | ||
|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | + | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No |
Latest revision as of 18:04, 28 August 2018
Edit Values | |
Core i5-7Y54 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i5-7Y54 |
Part Number | HE8067702739826 |
S-Spec | SR2ZX, SR345 |
Market | Mobile |
Introduction | August 30, 2016 (announced) August 30, 2016 (launched) |
Release Price | $281.00 |
Shop | Amazon |
General Specs | |
Family | Core i5 |
Series | i5-7Y |
Locked | Yes |
Frequency | 1,200 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3,200 MHz (1 core) |
Bus type | OPI |
Bus rate | 4 GT/s |
Clock multiplier | 12 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Kaby Lake |
Platform | Kaby Lake |
Core Name | Kaby Lake Y |
Core Family | 6 |
Core Model | 142 |
Core Stepping | H0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 2 |
Threads | 4 |
Max Memory | 16 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 0.55 V-1.52 V |
TDP | 4.5 W |
cTDP down | 3.5 W |
cTDP down frequency | 600 MHz |
cTDP up | 7 W |
cTDP up frequency | 1,600 MHz |
Tjunction | 0 °C – 100 °C |
Tstorage | -25 °C – 125 °C |
Packaging | |
Package | FCBGA-1515 (BGA) |
Dimension | 20 mm × 16.5 mm × 0.5 mm |
Pitch | 0.4 mm |
Contacts | 1515 |
Core i5-7Y54 is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by Intel in mid-2016. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a Turbo Boost frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's HD Graphics 615 IGP operating at 300 MHz with a burst frequency of 950 MHz.
This specific model has a configurable TDP-down of 3.5 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Facts about "Core i5-7Y54 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i5-7Y54 - Intel#io + |
base frequency | 1,200 MHz (1.2 GHz, 1,200,000 kHz) + |
bus rate | 4,000 MT/s (4 GT/s, 4,000,000 kT/s) + |
bus type | OPI + |
clock multiplier | 12 + |
core count | 2 + |
core family | 6 + |
core model | 142 + |
core name | Kaby Lake Y + |
core stepping | H0 + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | Intel + |
device id | 0x591E + |
family | Core i5 + |
first announced | August 30, 2016 + |
first launched | August 30, 2016 + |
full page name | intel/core i5/i5-7y54 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology + and My WiFi Technology + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel smart response technology support | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics 615 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + |
integrated gpu max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | August 30, 2016 + |
main image | + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
max memory bandwidth | 27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 10 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Kaby Lake + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | i5-7Y54 + |
name | Core i5-7Y54 + |
package | FCBGA-1515 + |
part number | HE8067702739826 + |
platform | Kaby Lake + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) + |
s-spec | SR2ZX + and SR345 + |
series | i5-7Y + |
smp max ways | 1 + |
supported memory type | DDR3L-1600 + and LPDDR3-1866 + |
tdp | 4.5 W (4,500 mW, 0.00603 hp, 0.0045 kW) + |
tdp down | 3.5 W (3,500 mW, 0.00469 hp, 0.0035 kW) + |
tdp down frequency | 600 MHz (0.6 GHz, 600,000 kHz) + |
tdp up | 7 W (7,000 mW, 0.00939 hp, 0.007 kW) + |
tdp up frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
technology | CMOS + |
thread count | 4 + |
turbo frequency (1 core) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |