m (Bot: moving all {{mpu}} to {{chip}}) |
|||
(15 intermediate revisions by 3 users not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Core i7-7567U}} | {{intel title|Core i7-7567U}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Core i7-7567U |
− | | no image | + | |no image=Yes |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | + | |model number=i7-7567U | |
− | | designer | + | |s-spec=SR367 |
− | | manufacturer | + | |market=Mobile |
− | | model number | + | |first announced=January 3, 2017 |
− | + | |first launched=January 3, 2017 | |
− | + | |release price=$415.00 | |
− | + | |family=Core i7 | |
− | + | |series=i7-7500 | |
− | | s-spec | + | |locked=Yes |
− | + | |frequency=3,500 MHz | |
− | | market | + | |turbo frequency1=4,000 MHz |
− | | first announced | + | |bus type=OPI |
− | | first launched | + | |bus rate=4 GT/s |
− | + | |clock multiplier=35 | |
− | + | |isa=x86-64 | |
− | | release price | + | |isa family=x86 |
− | + | |microarch=Kaby Lake | |
− | | family | + | |platform=Kaby Lake |
− | | series | + | |core name=Kaby Lake U |
− | | locked | + | |core family=6 |
− | | frequency | + | |core model=142 |
− | + | |core stepping=J1 | |
− | | turbo frequency1 | + | |process=14 nm |
− | + | |technology=CMOS | |
− | + | |word size=64 bit | |
− | + | |core count=2 | |
− | | bus type | + | |thread count=4 |
− | + | |max cpus=1 | |
− | | bus rate | + | |max memory=16 GiB |
− | + | |v core min=0.55 V | |
− | | clock multiplier | + | |v core max=1.52 V |
− | + | |tdp=28 W | |
− | + | |ctdp down=23 W | |
− | | isa | + | |tjunc min=0 °C |
− | | isa | + | |tjunc max=100 °C |
− | | microarch | + | |tstorage min=-25 °C |
− | | platform | + | |tstorage max=125 °C |
− | + | |package module 1={{packages/intel/fcbga-1356}} | |
− | |||
− | | core name | ||
− | | core family | ||
− | | core model | ||
− | | core stepping | ||
− | | process | ||
− | |||
− | | technology | ||
− | |||
− | |||
− | |||
− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
− | |||
− | |||
− | | v core min | ||
− | | v core max | ||
− | |||
− | |||
− | |||
− | |||
− | | tdp | ||
− | | ctdp down | ||
− | |||
− | |||
− | |||
− | | tjunc min | ||
− | | tjunc max | ||
− | |||
− | |||
− | | tstorage min | ||
− | | tstorage max | ||
− | |||
− | |||
− | |||
− | |||
− | | package | ||
− | |||
− | |||
− | |||
− | |||
− | |||
}} | }} | ||
'''Core i7-7567U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's improved [[14 nm process|14nm+ process]]. The i7-7567U operates at 3.5 GHz with a TDP of 28 W and with a {{intel|Turbo Boost}} frequency of 4 GHz for a single active core. This MPU supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory and incorporates Intel's {{intel|Iris Plus Graphics 650}} [[IGP]] operating at 300 MHz with a burst frequency of 1.15 GHz. This particular [[GPU]] includes an additional 64 MiB of [[eDRAM]] [[L4$]]. | '''Core i7-7567U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is manufactured on Intel's improved [[14 nm process|14nm+ process]]. The i7-7567U operates at 3.5 GHz with a TDP of 28 W and with a {{intel|Turbo Boost}} frequency of 4 GHz for a single active core. This MPU supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory and incorporates Intel's {{intel|Iris Plus Graphics 650}} [[IGP]] operating at 300 MHz with a burst frequency of 1.15 GHz. This particular [[GPU]] includes an additional 64 MiB of [[eDRAM]] [[L4$]]. | ||
+ | This model has a configurable TDP-down of 23 W. | ||
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} | {{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} | ||
Line 98: | Line 54: | ||
|l1i break=2x32 KiB | |l1i break=2x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |||
|l1d cache=64 KiB | |l1d cache=64 KiB | ||
|l1d break=2x32 KiB | |l1d break=2x32 KiB | ||
Line 111: | Line 66: | ||
|l3 desc=16-way set associative | |l3 desc=16-way set associative | ||
|l3 policy=write-back | |l3 policy=write-back | ||
+ | |l4 cache=64 MiB | ||
}} | }} | ||
Line 163: | Line 119: | ||
| hdmi ver = 1.4a | | hdmi ver = 1.4a | ||
| dp ver = 1.2 | | dp ver = 1.2 | ||
− | | edp ver = 1. | + | | edp ver = 1.4 |
| max res hdmi = 4096x2304 | | max res hdmi = 4096x2304 | ||
| max res hdmi freq = 30 Hz | | max res hdmi freq = 30 Hz | ||
Line 182: | Line 138: | ||
| intel clear video hd = Yes | | intel clear video hd = Yes | ||
}} | }} | ||
+ | {{kaby lake hardware accelerated video table|col=1}} | ||
== Features == | == Features == | ||
Line 206: | Line 163: | ||
|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | + | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No |
Latest revision as of 15:23, 13 December 2017
Edit Values | |||||||||||||
Core i7-7567U | |||||||||||||
General Info | |||||||||||||
Designer | Intel | ||||||||||||
Manufacturer | Intel | ||||||||||||
Model Number | i7-7567U | ||||||||||||
S-Spec | SR367 | ||||||||||||
Market | Mobile | ||||||||||||
Introduction | January 3, 2017 (announced) January 3, 2017 (launched) | ||||||||||||
Release Price | $415.00 | ||||||||||||
Shop | Amazon | ||||||||||||
General Specs | |||||||||||||
Family | Core i7 | ||||||||||||
Series | i7-7500 | ||||||||||||
Locked | Yes | ||||||||||||
Frequency | 3,500 MHz | ||||||||||||
Turbo Frequency | 4,000 MHz (1 core) | ||||||||||||
Bus type | OPI | ||||||||||||
Bus rate | 4 GT/s | ||||||||||||
Clock multiplier | 35 | ||||||||||||
Microarchitecture | |||||||||||||
ISA | x86-64 (x86) | ||||||||||||
Microarchitecture | Kaby Lake | ||||||||||||
Platform | Kaby Lake | ||||||||||||
Core Name | Kaby Lake U | ||||||||||||
Core Family | 6 | ||||||||||||
Core Model | 142 | ||||||||||||
Core Stepping | J1 | ||||||||||||
Process | 14 nm | ||||||||||||
Technology | CMOS | ||||||||||||
Word Size | 64 bit | ||||||||||||
Cores | 2 | ||||||||||||
Threads | 4 | ||||||||||||
Max Memory | 16 GiB | ||||||||||||
Multiprocessing | |||||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||||
Electrical | |||||||||||||
Vcore | 0.55 V-1.52 V | ||||||||||||
TDP | 28 W | ||||||||||||
cTDP down | 23 W | ||||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||||
Packaging | |||||||||||||
|
Core i7-7567U is a 64-bit dual-core high-end performance x86 mobile microprocessor introduced by Intel in early 2017. This processor, which is based on the Kaby Lake microarchitecture, is manufactured on Intel's improved 14nm+ process. The i7-7567U operates at 3.5 GHz with a TDP of 28 W and with a Turbo Boost frequency of 4 GHz for a single active core. This MPU supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory and incorporates Intel's Iris Plus Graphics 650 IGP operating at 300 MHz with a burst frequency of 1.15 GHz. This particular GPU includes an additional 64 MiB of eDRAM L4$.
This model has a configurable TDP-down of 23 W.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||||||||||||||
|
Memory controller[edit]
Integrated Memory Controller
|
||||||||||||||
|
Expansions[edit]
Expansion Options
|
||||||||
|
Graphics[edit]
The Iris Plus Graphics 650 includes 64 MiB of L4 eDRAM cache in addition to everything else.
Integrated Graphics Information
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-7567U - Intel#package + and Core i7-7567U - Intel#io + |
base frequency | 3,500 MHz (3.5 GHz, 3,500,000 kHz) + |
bus rate | 4,000 MT/s (4 GT/s, 4,000,000 kT/s) + |
bus type | OPI + |
clock multiplier | 35 + |
core count | 2 + |
core family | 6 + |
core model | 142 + |
core name | Kaby Lake U + |
core stepping | J1 + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | Intel + |
device id | 0x5927 + |
family | Core i7 + |
first announced | January 3, 2017 + |
first launched | January 3, 2017 + |
full page name | intel/core i7/i7-7567u + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, Small Business Advantage +, My WiFi Technology + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel identity protection technology support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel small business advantage support | true + |
has intel smart response technology support | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | Iris Plus Graphics 650 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 48 + |
integrated gpu max frequency | 1,150 MHz (1.15 GHz, 1,150,000 KHz) + |
integrated gpu max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l4$ size | 64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) + |
ldate | January 3, 2017 + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 12 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Kaby Lake + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | i7-7567U + |
name | Core i7-7567U + |
package | FCBGA-1356 + |
platform | Kaby Lake + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 415.00 (€ 373.50, £ 336.15, ¥ 42,881.95) + |
s-spec | SR367 + |
series | i7-7500 + |
smp max ways | 1 + |
supported memory type | LPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 + |
tdp | 28 W (28,000 mW, 0.0375 hp, 0.028 kW) + |
tdp down | 23 W (23,000 mW, 0.0308 hp, 0.023 kW) + |
technology | CMOS + |
thread count | 4 + |
turbo frequency (1 core) | 4,000 MHz (4 GHz, 4,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |