From WikiChip
Difference between revisions of "baikal/baikal-t1"
< baikal

m (Bot: moving all {{mpu}} to {{chip}})
 
(20 intermediate revisions by one other user not shown)
Line 1: Line 1:
 
{{baikal title|Baikal-T1}}
 
{{baikal title|Baikal-T1}}
−
{{mpu
+
{{chip
 
| name              = Baikal-T1
 
| name              = Baikal-T1
−
| image              =  
+
| image              = Baikal-T1.png
 
| image size        =  
 
| image size        =  
−
| no image          = yes
 
 
| caption            =  
 
| caption            =  
 
| designer          = Baikal Electronics
 
| designer          = Baikal Electronics
 +
| designer 2        = Imagination Technologies
 
| manufacturer      = TSMC
 
| manufacturer      = TSMC
 
| model number      = Baikal-T1
 
| model number      = Baikal-T1
Line 17: Line 17:
  
 
| family            =  
 
| family            =  
 +
| series              = Baikal
 
| locked            =  
 
| locked            =  
 
| frequency          = 1200 MHz
 
| frequency          = 1200 MHz
 +
| bus type          = AXI
  
 
| isa family        = MIPS
 
| isa family        = MIPS
Line 24: Line 26:
 
| microarch          = P5600  
 
| microarch          = P5600  
 
| platform          =  
 
| platform          =  
−
| core name          =  
+
| core name          = P5600
 
| core stepping      =  
 
| core stepping      =  
 
| process            = 28 nm
 
| process            = 28 nm
 
| die size          =  
 
| die size          =  
−
| word size          = 32 bits
+
| word size          = 32 bit
 
| core count        = 2
 
| core count        = 2
 
| thread count      = 2
 
| thread count      = 2
 
| max cpus          = 1
 
| max cpus          = 1
−
| max memory        = 4 GB
+
| max memory        = 8 GiB
  
 
| electrical          = yes
 
| electrical          = yes
 
| tdp                = 5 W
 
| tdp                = 5 W
 +
| tcase min            = 0 °C
 +
| tcase max            = 70 °C
  
−
| packaging         = Yes
+
| packaging           = Yes
−
| package           = FCBGA576
+
| package 0          = FCBGA-576
−
| package type       = FCBGA
+
| package 0 type     = FCBGA
−
| package pitch     =  
+
| package 0 pins      = 576
−
| package size      = 25mm x 25mm x 1.5mm
+
| package 0 pitch     =
−
| socket             = BGA576
+
| package 0 width    = 25 mm
−
| socket type       = BGA
+
| package 0 length    = 25 mm
 +
| package 0 height    = 1.5 mm
 +
| socket 0            = BGA-576
 +
| socket 0 type       = BGA
 
}}
 
}}
−
The '''Baikal-T1''' is a [[32-bit architecture|32-bit]] [[dual-core]] microprocessor introduced by [[Baikal Electronics]] in 2015. The chip entered mass production in early 2016. The Baikal-T1 incorporates two of [[Imagination Technologies]] high-performance P5600 cores implementing the [[MIPS32]] ISA up to release 5.
+
'''Baikal-T1''' is a {{arch|32}} [[dual-core]] [[MIPS]] [[system on a chip]] introduced by [[Baikal Electronics]] in 2015 for the embedded market. The chip entered mass production in early 2016. The Baikal-T1 incorporates two of [[Imagination Technologies|Imagination]] high-performance {{imgtec|P5600}} cores and is manufactured on [[TSMC]]'s [[28 nm process]]. The Baikal-T1 supports up to 8 GiB of DDR3-1600.
  
 
The chip consumes less than 5W and can be used in fanless designs.
 
The chip consumes less than 5W and can be used in fanless designs.
  
 
== Cache ==
 
== Cache ==
−
{{cache info
+
{{cache size
−
|l1i cache=32 KiB
+
|l1 cache=128 KiB
−
|l1i break=1x32 KiB
+
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 
|l1i desc=4-way set associative
 
|l1i desc=4-way set associative
−
|l1i extra=(per core, write-back)
+
|l1d cache=64 KiB
−
|l1d cache=32 KiB
+
|l1d break=2x32 KiB
−
|l1d break=1x32 KiB
 
 
|l1d desc=4-way set associative
 
|l1d desc=4-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
 
|l2 cache=1 MiB
 
|l2 cache=1 MiB
 
|l2 break=2x512 KiB
 
|l2 break=2x512 KiB
−
|l2 desc=4-way set associative
+
|l2 desc=8-way set associative
−
|l2 extra=(shared)
 
 
}}
 
}}
  
 
== Memory controller ==
 
== Memory controller ==
−
{{integrated memory controller
+
{{memory controller
−
| type               = DDR3-1600
+
|type=DDR3-1600
−
| controllers       = 1
+
|ecc=Yes
−
| channels           = 2
+
|max mem=8 GiB
−
| ecc support        = Yes
+
|controllers=1
−
| max bandwidth     =  
+
|channels=1
−
| max memory        =  
+
|max bandwidth=11.92 GiB/s
 +
|bandwidth schan=11.92 GiB/s
 
}}
 
}}
  
 
== Expansions ==
 
== Expansions ==
−
{{mpu expansions
+
{{expansions
−
| pcie revision     = 3.0
+
|pcie revision=3.0
−
| pcie lanes         = 4
+
|pcie lanes=4
−
| pcie lanes 2      =  
+
|pcie config=x4
−
| pcie lanes N      =  
+
|usb revision=2.0
−
| pcie config        =  
+
|usb rate=480 Mib/s
−
| pcie config 1      =  
+
|usb extra=8-bit ULPI PHY
−
| pcie config 2      =  
+
|uart=Yes
−
| pcie config N      =  
+
|uart ports=2
−
| usb revision       = 2.0
+
|sata revision=3.1
−
| usb ports         = 2
+
|sata ports=2
−
| sata revision      = 3.0
+
|i2c=Yes
−
| sata ports         = 2
+
|i2c ports=2
−
| integrated lan    = 1
+
|gp io=32 bit
−
| uart              =  
+
|jtag=Yes
−
| gp io              =  
+
|integrated lan=Yes
 
}}
 
}}
  
 
== Networking ==
 
== Networking ==
−
The Baikal-T1 has support for 1x10Gb and 2x1Gb Ethernet ports.
+
{{network
−
{{soc networking
+
|eth opts=Yes
−
| SFI interface    =  
+
|1ge=Yes
−
| KR interface      =  
+
|1ge ports=2
−
| KR4 interface    =  
+
|10ge=Yes
−
| KX interface      =  
+
|10ge ports=1
−
| KX4 interface    =  
+
|mii opts=Yes
−
| 10Base-T          =
+
|rgmii=Yes
−
| 100Base-T        =
+
|rgmii ports=2
−
| 1000Base-T        = Yes
 
−
| 10GBase-T        = Yes
 
 
}}
 
}}
 +
 +
== Block Diagram ==
 +
[[File:baikal-t1 block diagram.png|800px]]

Latest revision as of 16:10, 13 December 2017

Edit Values
Baikal-T1
Baikal-T1.png
General Info
DesignerBaikal Electronics,
Imagination Technologies
ManufacturerTSMC
Model NumberBaikal-T1
MarketEmbedded
IntroductionJune 1, 2015 (announced)
February, 2016 (launched)
General Specs
SeriesBaikal
Frequency1200 MHz
Bus typeAXI
Microarchitecture
ISAMIPS32 (MIPS)
MicroarchitectureP5600
Core NameP5600
Process28 nm
Word Size32 bit
Cores2
Threads2
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP5 W
Tcase0 °C – 70 °C

Baikal-T1 is a 32-bit dual-core MIPS system on a chip introduced by Baikal Electronics in 2015 for the embedded market. The chip entered mass production in early 2016. The Baikal-T1 incorporates two of Imagination high-performance P5600 cores and is manufactured on TSMC's 28 nm process. The Baikal-T1 supports up to 8 GiB of DDR3-1600.

The chip consumes less than 5W and can be used in fanless designs.

Cache[edit]

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB4-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB4-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x512 KiB8-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1600
Supports ECCYes
Max Mem8 GiB
Controllers1
Channels1
Max Bandwidth11.92 GiB/s
12,206.08 MiB/s
12.799 GB/s
12,799.003 MB/s
0.0116 TiB/s
0.0128 TB/s
Bandwidth
Single 11.92 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes4
Configsx4
USB
Revision2.0
Rate480 Mib/s
Features8-bit ULPI PHY
UART
Ports2
SATA
Revision3.1
Ports2
I²C
Ports2
Integrated LANYes
GP I/O32 bit
JTAGYes


Networking[edit]

[Edit/Modify Network Info]

ethernet plug icon.svg
Networking
Ethernet
1 GigEYes (Ports: 2)
10GbEYes (Ports: 1)
MII
RGMIIYes (Ports: 2)

Block Diagram[edit]

baikal-t1 block diagram.png

Retrieved from "https://en.wikichip.org/w/index.php?title=baikal/baikal-t1&oldid=70160"
Facts about "Baikal-T1 - Baikal Electronics"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Baikal-T1 - Baikal Electronics#io +
base frequency1,200 MHz (1.2 GHz, 1,200,000 kHz) +
bus typeAXI +
core count2 +
core nameP5600 +
designerBaikal Electronics + and Imagination Technologies +
first announcedJune 1, 2015 +
first launchedFebruary 2016 +
full page namebaikal/baikal-t1 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaMIPS32 +
isa familyMIPS +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description4-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldateFebruary 2016 +
main imageFile:Baikal-T1.png +
manufacturerTSMC +
market segmentEmbedded +
max case temperature343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count1 +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels1 +
max pcie lanes4 +
microarchitectureP5600 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberBaikal-T1 +
nameBaikal-T1 +
process28 nm (0.028 μm, 2.8e-5 mm) +
seriesBaikal +
smp max ways1 +
supported memory typeDDR3-1600 +
tdp5 W (5,000 mW, 0.00671 hp, 0.005 kW) +
thread count2 +
word size32 bit (4 octets, 8 nibbles) +