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Difference between revisions of "intel/core i5/i5-6287u"
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{{intel title|Core i5-6287U}}
 
{{intel title|Core i5-6287U}}
−
{{mpu
+
{{chip
−
| name               = Intel Core i5-6287U
+
|name=Core i5-6287U
−
| image             =
+
|image=skylake u (front; iris).png
−
| image size        =
+
|designer=Intel
−
| no image          = yes
+
|manufacturer=Intel
−
| caption            =  
+
|model number=i5-6287U
−
| designer           = Intel
+
|part number=FJ8066202499001
−
| manufacturer       = Intel
+
|s-spec=SR2JJ
−
| model number       = i5-6287U
+
|market=Mobile
−
| part number       = FJ8066202499001
+
|first announced=September 1, 2015
−
| market             = Mobile
+
|first launched=September 27, 2015
−
| first announced   = July 1, 2015
+
|release price=$304.00
−
| first launched     = February, 2016
+
|family=Core i5
−
| last order        =  
+
|series=i5-6000
−
| last shipment      =
+
|locked=Yes
−
 
+
|frequency=3,100 MHz
−
| family             = Core i5
+
|turbo frequency1=3,500 MHz
−
| series             = 6200
+
|turbo frequency2=3,300 MHz
−
| locked             = Yes
+
|bus type=OPI
−
| frequency         = 3100 MHz
+
|bus rate=4 GT/s
−
| turbo frequency    = 3500 MHz
+
|clock multiplier=31
−
| turbo frequency1   = 3500 MHz
+
|isa=x86-64
−
| turbo frequency2   = 3300 MHz
+
|isa family=x86
−
| turbo frequency3  =
+
|microarch=Skylake
−
| turbo frequency4  =
+
|core name=Skylake U
−
| bus type           =  
+
|core family=6
−
| bus speed          =  
+
|core model=78
−
| clock multiplier   = 31
+
|core stepping=K1
−
| s-spec            = SR2JJ
+
|process=14 nm
−
 
+
|technology=CMOS
−
| isa family         = x86
+
|mcp=Yes
−
| isa                = x86-64
+
|die count=3
−
| microarch          = Skylake  
+
|word size=64 bit
−
| platform          =  
+
|core count=2
−
| core name          =  
+
|thread count=4
−
| core stepping     = K1
+
|max cpus=1
−
| process           = 14 nm
+
|max memory=32 GiB
−
| die size          =  
+
|v core min=0.55 V
−
| word size         = 64 bits
+
|v core max=1.52 V
−
| core count         = 2
+
|tdp=28 W
−
| thread count       = 4
+
|ctdp down=23 W
−
| max cpus           = 1
+
|tjunc min=0 °C
−
| max memory         = 32 GB
+
|tjunc max=100 °C
−
 
+
|tstorage min=-25 °C
−
| electrical        = Yes
+
|tstorage max=125 °C
−
| tdp               = 28 W
+
|package module 1={{packages/intel/fcbga-1356}}
−
| temp max          = 100 C
+
|turbo frequency=3500 MHz
−
| ctdp down         = 23 W
 
−
 
 
−
| packaging          = Yes
 
−
| package            = FCBGA1356
 
−
| package type      = FCBGA
 
−
| package pitch      =  
 
−
| package size      = 42mm X 24mm X 1.3mm
 
−
| socket            = BGA1356
 
−
| socket type        = BGA
 
 
}}
 
}}
−
The '''Intel Core i5-6287U''' is a [[dual core]] [[64-bit architecture|64-bit]] [[microprocessor]] set to be released by [[Intel]] in 2016. The microprocessor is based on the [[Skylake]] [[microarchitecture]], manufactured using 14nm process and incorporates the {{intel|Iris Graphics 550}}. This MPU supports configurable TDP down mode allowing for a cTDP down of 23W.
+
'''Core i5-6287U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 3.1 GHz with a {{intel|turbo boost}} of up to 3.5 GHz. The i5-6287U has a TDP of 28 W with a configurable TDP-down of 23 W. This chip incorporates the {{intel|Iris Graphics 550}} GPU operating at 300 MHz with a burst frequency of 1.1 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6287U comes with an additional 64 MiB of [[embedded DRAM]] side cache.
  
 
== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
−
{{cache info
+
{{cache size
−
|l1i cache=128 KiB
+
|l1 cache=128 KiB
−
|l1i break=4x32 KiB
+
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i extra=(per core, write-back)
+
|l1d cache=64 KiB
−
|l1d cache=128 KiB
+
|l1d break=2x32 KiB
−
|l1d break=4x32 KiB
 
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
 
|l2 cache=512 KiB
 
|l2 cache=512 KiB
 
|l2 break=2x256 KiB
 
|l2 break=2x256 KiB
−
|l2 desc=8-way set associative
+
|l2 desc=4-way set associative
−
|l2 extra=(per core, write-back)
+
|l2 policy=write-back
 
|l3 cache=4 MiB
 
|l3 cache=4 MiB
−
|l3 break=4 MiB
+
|l3 break=2x2 MiB
−
|l3 desc=shared
+
|l3 policy=write-back
 +
|l4 cache=64 MiB
 +
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR4-2133
 +
|type 2=LPDDR3-1866
 +
|type 3=DDR3L-1600
 +
|ecc=No
 +
|max mem=32 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=31.79 GiB/s
 +
|bandwidth schan=15.89 GiB/s
 +
|bandwidth dchan=31.79 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 12
 +
| pcie config        = 1x4
 +
| pcie config 2      = 2x2
 +
| pcie config 3      = 1x2+2x1
 +
| pcie config 4      = 4x1
 
}}
 
}}
  
 
== Graphics ==
 
== Graphics ==
−
{{integrated graphic
+
The Iris Graphics 550 includes 64 MiB of side eDRAM cache in addition to everything else.
−
| gpu               = Intel Iris Graphics 550
+
{{integrated graphics
−
| displays           = 3
+
| gpu                 = Iris Graphics 550
−
| frequency         = 300 MHz
+
| device id          = 0x1927
−
| max frequency     = 1000 MHz
+
| designer            = Intel
−
| max memory         = 1700 MB
+
| execution units    = 48
−
| output edp         = Yes
+
| max displays       = 3
−
| output dp         = Yes
+
| max memory          = 32 GiB
−
| output hdmi       = Yes
+
| frequency           = 300 MHz
−
| output vga         = Yes
+
| max frequency       = 1,100 MHz
−
| output dvi         = Yes
+
 
 +
| output crt          =
 +
| output sdvo         =  
 +
| output dsi          =
 +
| output edp         = Yes
 +
| output dp           = Yes
 +
| output hdmi         = Yes
 +
| output vga         =  
 +
| output dvi         = Yes
 +
 
 
| directx ver        = 12
 
| directx ver        = 12
 
| opengl ver        = 4.4
 
| opengl ver        = 4.4
Line 103: Line 128:
 
| max res edp        = 4096x2304
 
| max res edp        = 4096x2304
 
| max res edp freq  = 60 Hz
 
| max res edp freq  = 60 Hz
−
| max res vga        = 1920x1200
+
| max res vga        =  
−
| max res vga freq  = 60 Hz
+
| max res vga freq  =  
−
}}
 
  
−
== Memory controller ==
+
| features            = Yes
−
{{integrated memory controller
+
| intel quick sync    = Yes
−
| type              = DDR4-2133
+
| intel intru 3d      = Yes
−
| type 1            = LPDDR3-1866
+
| intel insider       =  
−
| type 2            = DDR3L-1600
+
| intel widi           =  
−
| controllers       = 1
+
| intel fdi            =  
−
| channels           = 2
+
| intel clear video    = Yes
−
| ecc support        = No
+
| intel clear video hd = Yes
−
| max bandwidth      = 34,100 MB/s
 
−
| max memory        = 32,768 MB
 
 
}}
 
}}
 +
{{skylake hardware accelerated video table|col=1}}
  
−
== Expansions ==
+
== Features ==  
−
{{mpu expansions
+
{{x86 features
−
| pcie revision      = 3.0
+
|real=Yes
−
| pcie lanes        = 12
+
|protected=Yes
−
| pcie config        = 1x4
+
|smm=Yes
−
| pcie config 1      = 2x2
+
|fpu=Yes
−
| pcie config 2      = 1x2+2x1
+
|x8616=Yes
−
| pcie config 3      = 4x1
+
|x8632=Yes
−
}}
+
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
  
−
== Features ==
+
|abm=Yes
−
{{mpu features
+
|tbm=No
−
| em64t    = Yes
+
|bmi1=Yes
−
| nx        = Yes
+
|bmi2=Yes
−
| txt      =  
+
|fma3=Yes
−
| tsx      = Yes
+
|fma4=No
−
| ht        = Yes
+
|aes=Yes
−
| tbt2     = Yes
+
|rdrand=Yes
−
| vt-x      = Yes
+
|sha=No
−
| vt-d      = Yes
+
|xop=No
−
| mmx      = Yes
+
|adx=Yes
−
| sse      = Yes
+
|clmul=Yes
−
| sse2      = Yes
+
|f16c=Yes
−
| sse3      = Yes
+
|tbt1=No
−
| ssse3    = Yes
+
|tbt2=Yes
−
| sse4      = Yes
+
|tbmt3=No
−
| sse4.1    = Yes
+
|bpt=No
−
| sse4.2    = Yes
+
|eist=Yes
−
| aes      = Yes
+
|sst=No
−
| avx      = Yes
+
|flex=Yes
−
| avx2      = Yes
+
|fastmem=No
−
| bmi      = Yes
+
|isrt=Yes
−
| bmi1      = Yes
+
|sba=No
−
| bmi2      = Yes
+
|mwt=Yes
−
| f16c      = Yes
+
|sipp=No
−
| fma3      = Yes
+
|att=No
−
| sgx      = Yes
+
|ipt=Yes
−
| eist      = Yes
+
|tsx=No
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 
}}
 
}}

Latest revision as of 15:20, 13 December 2017

Edit Values
Core i5-6287U
skylake u (front; iris).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi5-6287U
Part NumberFJ8066202499001
S-SpecSR2JJ
MarketMobile
IntroductionSeptember 1, 2015 (announced)
September 27, 2015 (launched)
Release Price$304.00
ShopAmazon
General Specs
FamilyCore i5
Seriesi5-6000
LockedYes
Frequency3,100 MHz
Turbo Frequency3500 MHz
Turbo Frequency3,500 MHz (1 core),
3,300 MHz (2 cores)
Bus typeOPI
Bus rate4 GT/s
Clock multiplier31
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake
Core NameSkylake U
Core Family6
Core Model78
Core SteppingK1
Process14 nm
TechnologyCMOS
MCPYes (3 dies)
Word Size64 bit
Cores2
Threads4
Max Memory32 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP28 W
cTDP down23 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1356 (BGA)
Dimension42 mm x 24 mm x 1.3 mm
Pitch0.65 mm
Ball Count1356
Ball CompSAC405
InterconnectBGA-1356

Core i5-6287U is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 3.1 GHz with a turbo boost of up to 3.5 GHz. The i5-6287U has a TDP of 28 W with a configurable TDP-down of 23 W. This chip incorporates the Iris Graphics 550 GPU operating at 300 MHz with a burst frequency of 1.1 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6287U comes with an additional 64 MiB of embedded DRAM side cache.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB write-back
L4$64 MiB
65,536 KiB
67,108,864 B
0.0625 GiB
     

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2133, LPDDR3-1866, DDR3L-1600
Supports ECCNo
Max Mem32 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes12
Configs1x4, 2x2, 1x2+2x1, 4x1


Graphics[edit]

The Iris Graphics 550 includes 64 MiB of side eDRAM cache in addition to everything else.

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUIris Graphics 550
DesignerIntelDevice ID0x1927
Execution Units48Max Displays3
Max Memory32 GiB
32,768 MiB
33,554,432 KiB
34,359,738,368 B
Frequency300 MHz
0.3 GHz
300,000 KHz
Burst Frequency1,100 MHz
1.1 GHz
1,100,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.3
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Flex MemoryFlex Memory Access
ISRTSmart Response Technology
MWTMy WiFi Technology
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-6287u&oldid=70636"
Facts about "Core i5-6287U - Intel"
RDF feed
has featureintegrated gpu +
integrated gpuIntel Iris Graphics 550 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ descriptionshared +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +