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Difference between revisions of "intel/xeon e5/e5-2608l v4"
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{{intel title|Xeon E5-2608L v4}} | {{intel title|Xeon E5-2608L v4}} | ||
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| name = Xeon E5-2608L v4 | | name = Xeon E5-2608L v4 | ||
| no image = Yes | | no image = Yes | ||
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| model number = E5-2608L v4 | | model number = E5-2608L v4 | ||
| part number = CM8066002045102 | | part number = CM8066002045102 | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Embedded | | market = Embedded | ||
| first announced = June 20, 2016 | | first announced = June 20, 2016 | ||
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| max memory = 1,536 GiB | | max memory = 1,536 GiB | ||
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| v core = 1.82 V | | v core = 1.82 V | ||
| v core tolerance = | | v core tolerance = | ||
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== Expansions == | == Expansions == | ||
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| pcie revision = 3.0 | | pcie revision = 3.0 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
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== Features == | == Features == | ||
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| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes | ||
Latest revision as of 16:27, 13 December 2017
| Edit Values | |
| Xeon E5-2608L v4 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | E5-2608L v4 |
| Part Number | CM8066002045102 |
| S-Spec | SR2P9 |
| Market | Embedded |
| Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
| Release Price | $363 |
| Shop | Amazon |
| General Specs | |
| Family | Xeon E5 |
| Series | E5-2000 |
| Locked | Yes |
| Frequency | 1,600 MHz |
| Turbo Frequency | Yes |
| Turbo Frequency | 1,700 MHz (1 core), 1,700 MHz (2 cores), 1,700 MHz (3 cores), 1,700 MHz (4 cores), 1,700 MHz (5 cores), 1,700 MHz (6 cores), 1,700 MHz (7 cores), 1,700 MHz (8 cores) |
| Bus type | QPI |
| Bus speed | 3,200 MHz |
| Bus rate | 2 × 6.4 GT/s |
| Clock multiplier | 16 |
| CPUID | 406F1 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Broadwell |
| Platform | Grantley EP 2S |
| Chipset | C610 Series |
| Core Name | Broadwell EP |
| Core Family | 6 |
| Core Model | 4F |
| Core Stepping | R0 |
| Process | 14 nm |
| Transistors | 3,200,000,000 |
| Technology | CMOS |
| Die | 246.24 mm² |
| Word Size | 64 bit |
| Cores | 8 |
| Threads | 16 |
| Max Memory | 1,536 GiB |
| Multiprocessing | |
| Max SMP | 2-Way (Multiprocessor) |
| Electrical | |
| Vcore | 1.82 V |
| VI/O | 1.2 V ± 3% |
| TDP | 50 W |
| Tcase | 0 °C – 94 °C |
| Tstorage | -25 °C – 125 °C |
The Xeon E5-2608L v4 is a 64-bit octa-core x86 microprocessor introduced by Intel in 2016. This embedded server MPU is designed for low-power 2S environments. Operating at 1.6 GHz with a turbo boost frequency of 1.7 GHz for a single active core, this MPU has a TDP of 50 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core, write-back) |
| L1D$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core, write-back) |
| L2$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB |
8x256 KiB 8-way set associative (per core, write-back) |
| L3$ | 20 MiB 20,480 KiB 20,971,520 B 0.0195 GiB |
8x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
| Integrated Memory Controller | |
| Type | DDR4-1866 |
| Controllers | 1 |
| Channels | 4 |
| ECC Support | Yes |
| Max bandwidth | 55.63 GiB/s |
| Bandwidth (single) | 13.91 GiB/s |
| Bandwidth (dual) | 27.82 GiB/s |
| Max memory | 1,536 GiB |
| Physical Address Extensions | 46 bit |
Expansions[edit]
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Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon E5-2608L v4 - Intel"
| l1d$ description | 8-way set associative + |
| l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
| l3$ description | 20-way set associative + |
| l3$ size | 20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) + |