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Difference between revisions of "intel/core i5/i5-470um"
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{{intel title|Core i5-470UM}} | {{intel title|Core i5-470UM}} | ||
− | {{ | + | {{chip |
| name = Intel Core i5-470UM | | name = Intel Core i5-470UM | ||
| no image = yes | | no image = yes | ||
Line 9: | Line 9: | ||
| manufacturer = Intel | | manufacturer = Intel | ||
| model number = i5-470UM | | model number = i5-470UM | ||
− | | part number = | + | | part number = CN80617005190AI |
| market = Mobile | | market = Mobile | ||
| first announced = October 1, 2010 | | first announced = October 1, 2010 | ||
Line 31: | Line 31: | ||
| s-spec = SLBXP | | s-spec = SLBXP | ||
| s-spec qs = | | s-spec qs = | ||
− | | cpuid = | + | | cpuid = 0x20655 |
+ | | isa family = x86 | ||
+ | | isa = x86-64 | ||
| microarch = Westmere | | microarch = Westmere | ||
| platform = Calpella | | platform = Calpella | ||
Line 51: | Line 53: | ||
| max cpus = 1 | | max cpus = 1 | ||
| max memory = 8 GiB | | max memory = 8 GiB | ||
+ | |||
+ | |||
+ | | v core = | ||
+ | | v core tolerance = | ||
+ | | v io = | ||
+ | | v io tolerance = | ||
+ | | sdp = | ||
+ | | tdp = 18 W | ||
+ | | tjunc min = 0 °C | ||
+ | | tjunc max = 105 °C | ||
+ | | tcase min = | ||
+ | | tcase max = | ||
+ | | tstorage min = -25 °C | ||
+ | | tstorage max = 125 °C | ||
+ | | tambient min = | ||
+ | | tambient max = | ||
+ | |||
+ | | package module 1 = {{packages/intel/bga-1288}} | ||
}} | }} | ||
'''Core i5-470UM''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core), is manufactured on a [[32 nm process]]. This MPU operates at a base frequency of 1.33 GHz with a {{intel|Turbo Boost}} frequency of 1.86 GHz and a TDP of 18 W. This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz. | '''Core i5-470UM''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core), is manufactured on a [[32 nm process]]. This MPU operates at a base frequency of 1.33 GHz with a {{intel|Turbo Boost}} frequency of 1.86 GHz and a TDP of 18 W. This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=128 KiB | ||
+ | |l1i cache=64 KiB | ||
+ | |l1i break=2x32 KiB | ||
+ | |l1i desc=4-way set associative | ||
+ | |l1i policy=write-back | ||
+ | |l1d cache=64 KiB | ||
+ | |l1d break=2x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=512 KiB | ||
+ | |l2 break=2x256 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=3 MiB | ||
+ | |l3 break=2x1.5 MiB | ||
+ | |l3 desc=12-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR3-800 | ||
+ | |ecc=No | ||
+ | |max mem=8 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=11.92 GiB/s | ||
+ | |bandwidth schan=5.96 GiB/s | ||
+ | |bandwidth dchan=11.92 GiB/s | ||
+ | |pae=36 bit | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 2.0 | ||
+ | | pcie lanes = 16 | ||
+ | | pcie config = 1x16 | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | {{integrated graphics | ||
+ | | gpu = HD Graphics (Ironlake) | ||
+ | | device id = 0x0046 | ||
+ | | designer = Intel | ||
+ | | execution units = 12 | ||
+ | | max displays = 2 | ||
+ | | max memory = | ||
+ | | frequency = 166 MHz | ||
+ | | max frequency = 500 MHz | ||
+ | |||
+ | | directx ver = 10.1 | ||
+ | | opengl ver = 2.1 | ||
+ | |||
+ | | features = Yes | ||
+ | | intel quick sync = | ||
+ | | intel intru 3d = | ||
+ | | intel insider = | ||
+ | | intel widi = | ||
+ | | intel fdi = Yes | ||
+ | | intel clear video = Yes | ||
+ | | intel clear video hd = Yes | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=No | ||
+ | |avx2=No | ||
+ | |||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=No | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=No | ||
+ | |tbt1=Yes | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |flex=Yes | ||
+ | |fastmem=Yes | ||
+ | |isrt=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=Yes | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=No | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdv=No | ||
+ | |rvi=No | ||
+ | }} |
Latest revision as of 16:19, 13 December 2017
Edit Values | ||||||||||
Intel Core i5-470UM | ||||||||||
General Info | ||||||||||
Designer | Intel | |||||||||
Manufacturer | Intel | |||||||||
Model Number | i5-470UM | |||||||||
Part Number | CN80617005190AI | |||||||||
S-Spec | SLBXP | |||||||||
Market | Mobile | |||||||||
Introduction | October 1, 2010 (announced) October 1, 2010 (launched) | |||||||||
Shop | Amazon | |||||||||
General Specs | ||||||||||
Family | Core i5 | |||||||||
Series | i5-400 | |||||||||
Locked | Yes | |||||||||
Frequency | 1,333.33 MHz | |||||||||
Turbo Frequency | Yes | |||||||||
Turbo Frequency | 1,866.66 MHz (1 core), 1,599.99 MHz (2 cores) | |||||||||
Bus type | DMI 1.0 | |||||||||
Bus rate | 1 × 2.5 GT/s | |||||||||
Clock multiplier | 10 | |||||||||
CPUID | 0x20655 | |||||||||
Microarchitecture | ||||||||||
ISA | x86-64 (x86) | |||||||||
Microarchitecture | Westmere | |||||||||
Platform | Calpella | |||||||||
Chipset | Ibex Peak | |||||||||
Core Name | Arrandale | |||||||||
Core Family | 6 | |||||||||
Core Model | 37 | |||||||||
Core Stepping | K0 | |||||||||
Process | 32 nm | |||||||||
Transistors | 382,000,000 | |||||||||
Technology | CMOS | |||||||||
Die | 81 mm² | |||||||||
Word Size | 64 bit | |||||||||
Cores | 2 | |||||||||
Threads | 4 | |||||||||
Max Memory | 8 GiB | |||||||||
Multiprocessing | ||||||||||
Max SMP | 1-Way (Uniprocessor) | |||||||||
Electrical | ||||||||||
TDP | 18 W | |||||||||
Tjunction | 0 °C – 105 °C | |||||||||
Tstorage | -25 °C – 125 °C | |||||||||
Packaging | ||||||||||
|
Core i5-470UM is a 64-bit x86 dual-core mobile microprocessor introduced by Intel in 2010. This processor, which is based on the Westmere microarchitecture (Arrandale core), is manufactured on a 32 nm process. This MPU operates at a base frequency of 1.33 GHz with a Turbo Boost frequency of 1.86 GHz and a TDP of 18 W. This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz.
Cache[edit]
- Main article: Westmere § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Core i5-470UM - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i5-470UM - Intel#package + and Core i5-470UM - Intel#io + |
base frequency | 1,333.33 MHz (1.333 GHz, 1,333,330 kHz) + |
bus links | 1 + |
bus rate | 2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) + |
bus type | DMI 1.0 + |
chipset | Ibex Peak + |
clock multiplier | 10 + |
core count | 2 + |
core family | 6 + |
core model | 37 + |
core name | Arrandale + |
core stepping | K0 + |
cpuid | 0x20655 + |
designer | Intel + |
device id | 0x0046 + |
die area | 81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) + |
family | Core i5 + |
first announced | October 1, 2010 + |
first launched | October 1, 2010 + |
full page name | intel/core i5/i5-470um + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Hyper-Threading Technology +, Turbo Boost Technology 1.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Extended Page Tables + and Flex Memory Access + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel turbo boost technology 1 0 | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics (Ironlake) + |
integrated gpu base frequency | 166 MHz (0.166 GHz, 166,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 12 + |
integrated gpu max frequency | 500 MHz (0.5 GHz, 500,000 KHz) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
ldate | October 1, 2010 + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Westmere + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | i5-470UM + |
name | Intel Core i5-470UM + |
package | BGA-1288 + |
part number | CN80617005190AI + |
platform | Calpella + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
s-spec | SLBXP + |
series | i5-400 + |
smp max ways | 1 + |
supported memory type | DDR3-800 + |
tdp | 18 W (18,000 mW, 0.0241 hp, 0.018 kW) + |
technology | CMOS + |
thread count | 4 + |
transistor count | 382,000,000 + |
turbo frequency (1 core) | 1,866.66 MHz (1.867 GHz, 1,866,660 kHz) + |
turbo frequency (2 cores) | 1,599.99 MHz (1.6 GHz, 1,599,990 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |