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Difference between revisions of "intel/xeon e3/e3-1280 v6"
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{{intel title|Xeon E3-1280 v6}}
 
{{intel title|Xeon E3-1280 v6}}
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{{mpu
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{{chip
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| name               = Xeon E3-1280 v6
+
|name=Xeon E3-1280 v6
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| no image           = Yes
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|no image=Yes
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| image              =
+
|designer=Intel
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| image size          =
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|manufacturer=Intel
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| caption            =
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|model number=E3-1280 v6
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| designer           = Intel
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|part number=CM8067702870647
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| manufacturer       = Intel
+
|part number 2=BX80677E31280V6
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| model number       = E3-1280 v6
+
|s-spec=SR325
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| part number         =  
+
|market=Workstation
−
| part number 2       =
+
|market 2=Server
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| market             = Workstation
+
|first announced=March 28, 2017
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| first announced     =  
+
|first launched=March 28, 2017
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| first launched     = 2017
+
|release price=$612
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| last order          =
+
|family=Xeon E3
−
| last shipment      =  
+
|series=E3-1200 v6
−
 
+
|locked=Yes
−
| family             = Xeon E3
+
|frequency=3,900 MHz
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| series             = E3-1200 v6
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|turbo frequency1=4,200 MHz
−
| locked             = Yes
+
|bus type=DMI 3.0
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| frequency           = 3,900 MHz
+
|bus rate=8 GT/s
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| turbo frequency    = Yes
+
|clock multiplier=39
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| turbo frequency1   =
+
|isa=x86-64
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| turbo frequency2    =
+
|isa family=x86
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| turbo frequency3    =
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|microarch=Kaby Lake
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| turbo frequency4    =  
+
|platform=Greenlow
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| bus type           = DMI 3.0
+
|chipset=Sunrise Point
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| bus speed          =
+
|chipset 2=Union Point
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| bus rate           = 8 GT/s
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|core name=Kaby Lake DT
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| clock multiplier   =  
+
|core family=6
−
| s-spec              =  
+
|core model=158
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| s-spec es          =
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|core stepping=B0
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| s-spec qs          =  
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|process=14 nm
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| cpuid              =
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|technology=CMOS
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|word size=64 bit
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| microarch           = Kaby Lake
+
|core count=4
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| platform           =  
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|thread count=8
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| chipset             =  
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|max cpus=1
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| core name           =  
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|max memory=64 GiB
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| core family         =  
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|v core min=0.55 V
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| core model         =  
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|v core max=1.52 V
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| core stepping       =  
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|tdp=72 W
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| process             = 14 nm
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|tstorage min=-25 °C
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| transistors        =
+
|tstorage max=125 °C
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| technology         = CMOS
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|package module 1={{packages/intel/lga-1151}}
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| die size            =
 
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| word size           = 64 bit
 
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| core count         = 4
 
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| thread count       = 8
 
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| max cpus           = 1
 
−
| max memory         =  
 
−
 
 
−
| electrical          = Yes
 
−
| v core             =  
 
−
| v core tolerance    =
 
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| sdp                =  
 
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| tdp                 = 74 W
 
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| ctdp down          =  
 
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| ctdp down frequency =
 
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| ctdp up            =
 
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| ctdp up frequency  =
 
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| temp max           =
 
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| temp min            =
 
−
 
 
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| packaging          =  
 
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| package             =
 
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| package type        =
 
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| package size        =
 
−
| socket              =
 
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| socket type        =  
 
 
}}
 
}}
−
The '''Xeon E3-1280 v6''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor set to be introduced by [[Intel]] in late 2016 or early 2017. Operating at 3.9 GHz, this MPU has a TDP of 74 W. This processor is a {{intel|Kaby Lake}}-based chip and is manufactured on a Intel's [[14 nm process]].
+
'''Xeon E3-1280 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The E3-1280 v6 operates at 3.9 GHz with a TDP of 72 W supporting a {{intel|Turbo Boost}} frequency of 4.2 GHz. The processor supports up to 64 GiB of dual-channel DDR4-2400 ECC memory. This model has no integrated graphics processor.
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{{unknown features}}
 
  
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/kaby lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
+
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
−
{{cache info
+
{{cache size
 +
|l1 cache=256 KiB
 
|l1i cache=128 KiB
 
|l1i cache=128 KiB
 
|l1i break=4x32 KiB
 
|l1i break=4x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i extra=(per core, write-back)
 
 
|l1d cache=128 KiB
 
|l1d cache=128 KiB
 
|l1d break=4x32 KiB
 
|l1d break=4x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
 
|l2 cache=1 MiB
 
|l2 cache=1 MiB
 
|l2 break=4x256 KiB
 
|l2 break=4x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
−
|l2 extra=(per core, write-back)
+
|l2 policy=write-back
 
|l3 cache=8 MiB
 
|l3 cache=8 MiB
−
|l3 desc=shared
+
|l3 break=4x2 MiB
 +
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 +
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3L-1866
 +
|type 2=DDR4-2400
 +
|ecc=Yes
 +
|max mem=64 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=35.76 GiB/s
 +
|bandwidth schan=17.88 GiB/s
 +
|bandwidth dchan=35.76 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 16
 +
| pcie config        = 1x16
 +
| pcie config 2      = 2x8
 +
| pcie config 3      = 1x8+2x4
 +
}}
 +
 
 +
== Graphics ==
 +
This processor has no integrated graphics processor.
 +
 
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
 +
 
 +
|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
 +
|bmi2=Yes
 +
|fma3=Yes
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=No
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=Yes
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=Yes
 +
|txt=Yes
 +
|ht=Yes
 +
|vpro=Yes
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 
}}
 
}}

Latest revision as of 15:27, 13 December 2017

Edit Values
Xeon E3-1280 v6
General Info
DesignerIntel
ManufacturerIntel
Model NumberE3-1280 v6
Part NumberCM8067702870647,
BX80677E31280V6
S-SpecSR325
MarketWorkstation, Server
IntroductionMarch 28, 2017 (announced)
March 28, 2017 (launched)
Release Price$612
ShopAmazon
General Specs
FamilyXeon E3
SeriesE3-1200 v6
LockedYes
Frequency3,900 MHz
Turbo Frequency4,200 MHz (1 core)
Bus typeDMI 3.0
Bus rate8 GT/s
Clock multiplier39
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureKaby Lake
PlatformGreenlow
ChipsetSunrise Point, Union Point
Core NameKaby Lake DT
Core Family6
Core Model158
Core SteppingB0
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores4
Threads8
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP72 W
Tstorage-25 °C – 125 °C
Packaging
PackageFCLGA-1151 (LGA)
FC-LGA14C		FCLGA-1151.svg
Dimension37.5 mm x 37.5 mm x 4.4 mm
Pitch0.914 mm
Contacts1151
SocketLGA-1151

Xeon E3-1280 v6 is a 64-bit quad-core x86 workstation/entry server microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The E3-1280 v6 operates at 3.9 GHz with a TDP of 72 W supporting a Turbo Boost frequency of 4.2 GHz. The processor supports up to 64 GiB of dual-channel DDR4-2400 ECC memory. This model has no integrated graphics processor.

Cache[edit]

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1866, DDR4-2400
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics[edit]

This processor has no integrated graphics processor.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1280_v6&oldid=70952"
Facts about "Xeon E3-1280 v6 - Intel"
RDF feed
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ descriptionshared +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +