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Difference between revisions of "intel/xeon e5/e5-2643 v4"
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m (Bot: moving all {{mpu}} to {{chip}})
 
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{{intel title|Xeon E5-2643 v4}}
 
{{intel title|Xeon E5-2643 v4}}
{{mpu
+
{{chip
 
| name                = Xeon E5-2643 v4
 
| name                = Xeon E5-2643 v4
 
| no image            = Yes
 
| no image            = Yes
Line 10: Line 10:
 
| model number        = E5-2643 v4
 
| model number        = E5-2643 v4
 
| part number        = CM8066002041500
 
| part number        = CM8066002041500
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Server
 
| market              = Server
 
| first announced    = June 20, 2016
 
| first announced    = June 20, 2016
Line 26: Line 26:
 
| turbo frequency    = Yes
 
| turbo frequency    = Yes
 
| turbo frequency1    = 3,700 MHz
 
| turbo frequency1    = 3,700 MHz
| turbo frequency2    =  
+
| turbo frequency2    = 3,700 MHz
 +
| turbo frequency3    = 3,600 MHz
 +
| turbo frequency4    = 3,600 MHz
 +
| turbo frequency5    = 3,600 MHz
 +
| turbo frequency6    = 3,600 MHz
 
| bus type            = QPI
 
| bus type            = QPI
 
| bus speed          = 4,800 MHz
 
| bus speed          = 4,800 MHz
Line 34: Line 38:
 
| s-spec              = SR2P4
 
| s-spec              = SR2P4
 
| s-spec es          =  
 
| s-spec es          =  
| s-spec qs          =  
+
| s-spec qs          = QKEZ
 
| cpuid              = 406F1
 
| cpuid              = 406F1
  
Line 54: Line 58:
 
| max memory          = 1,536 GiB
 
| max memory          = 1,536 GiB
  
| electrical          = Yes
+
 
 
| v core              = 1.82 V
 
| v core              = 1.82 V
 
| v core tolerance    =  
 
| v core tolerance    =  
Line 104: Line 108:
 
|l3 desc=20-way set associative
 
|l3 desc=20-way set associative
 
|l3 extra=(shared, per core, write-back)
 
|l3 extra=(shared, per core, write-back)
 +
}}
 +
 +
== Graphics ==
 +
This microprocessor has no [[integrated graphics processing unit]].
 +
 +
== Memory controller ==
 +
{{integrated memory controller
 +
| type              = DDR4-2400
 +
| controllers        = 1
 +
| channels          = 4
 +
| ecc support        = Yes
 +
| max bandwidth      = 71.53 GiB/s
 +
| bandwidth schan    = 17.88 GiB/s
 +
| bandwidth dchan    = 35.76 GiB/s
 +
| max memory        = 1,536 GiB
 +
| pae                = 46 bit
 +
}}
 +
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 40
 +
| pcie config        = x4
 +
| pcie config 1      = x8
 +
| pcie config 2      = x16
 +
}}
 +
 +
== Features ==
 +
{{x86 features
 +
| em64t      = Yes
 +
| nx          = Yes
 +
| txt        = Yes
 +
| tsx        = Yes
 +
| vpro        = Yes
 +
| ht          = Yes
 +
| tbt1        =
 +
| tbt2        = Yes
 +
| tbmt3      =
 +
| bpt        =
 +
| vt-x        = Yes
 +
| vt-d        = Yes
 +
| ept        = Yes
 +
| mmx        = Yes
 +
| sse        = Yes
 +
| sse2        = Yes
 +
| sse3        = Yes
 +
| ssse3      = Yes
 +
| sse4.1      = Yes
 +
| sse4.2      = Yes
 +
| aes        = Yes
 +
| pclmul      = Yes
 +
| avx        = Yes
 +
| avx2        = Yes
 +
| bmi        = Yes
 +
| bmi1        = Yes
 +
| bmi2        = Yes
 +
| f16c        = Yes
 +
| fma3        = Yes
 +
| mpx        =
 +
| sgx        =
 +
| eist        = Yes
 +
| secure key  = Yes
 +
| os guard    = Yes
 +
| intel at    =
 +
| intel ipt  =
 
}}
 
}}

Latest revision as of 15:27, 13 December 2017

Edit Values
Xeon E5-2643 v4
General Info
DesignerIntel
ManufacturerIntel
Model NumberE5-2643 v4
Part NumberCM8066002041500
S-SpecSR2P4
QKEZ (QS)
MarketServer
IntroductionJune 20, 2016 (announced)
June 20, 2016 (launched)
Release Price$1552.00
ShopAmazon
General Specs
FamilyXeon E5
SeriesE5-2000
LockedYes
Frequency3,400 MHz
Turbo FrequencyYes
Turbo Frequency3,700 MHz (1 core),
3,700 MHz (2 cores),
3,600 MHz (3 cores),
3,600 MHz (4 cores),
3,600 MHz (5 cores),
3,600 MHz (6 cores)
Bus typeQPI
Bus speed4,800 MHz
Bus rate2 × 9.6 GT/s
Clock multiplier34
CPUID406F1
Microarchitecture
MicroarchitectureBroadwell
PlatformGrantley EP 2S
ChipsetC610 Series
Core NameBroadwell EP
Core Family6
Core Model4F
Core SteppingR0
Process14 nm
Transistors3,200,000,000
TechnologyCMOS
Die246.24 mm²
Word Size64 bit
Cores6
Threads12
Max Memory1,536 GiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
Vcore1.82 V
VI/O1.2 V ± 3%
TDP135 W
Tcase0 °C – 75 °C
Tstorage-25 °C – 125 °C

The Xeon E5-2643 v4 is a 64-bit hexa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for frequency-optimized 2S environments (2U square form factor). Operating at 3.4 GHz with a turbo boost frequency of 3.7 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a 14 nm process (based on Broadwell).

Cache[edit]

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 192 KiB
196,608 B
0.188 MiB
6x32 KiB 8-way set associative (per core, write-back)
L1D$ 192 KiB
196,608 B
0.188 MiB
6x32 KiB 8-way set associative (per core, write-back)
L2$ 1.5 MiB
1,536 KiB
1,572,864 B
0.00146 GiB
6x256 KiB 8-way set associative (per core, write-back)
L3$ 20 MiB
20,480 KiB
20,971,520 B
0.0195 GiB
6x3.325 MiB 20-way set associative (shared, per core, write-back)

Graphics[edit]

This microprocessor has no integrated graphics processing unit.

Memory controller[edit]

Integrated Memory Controller
Type DDR4-2400
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 71.53 GiB/s
Bandwidth (single) 17.88 GiB/s
Bandwidth (dual) 35.76 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes40
Configsx4, x16


Features[edit]

l1d$ description8-way set associative +
l1d$ size192 KiB (196,608 B, 0.188 MiB) +
l1i$ description8-way set associative +
l1i$ size192 KiB (196,608 B, 0.188 MiB) +
l2$ description8-way set associative +
l2$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
l3$ description20-way set associative +
l3$ size20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) +