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Difference between revisions of "intel/xeon e5/e5-2683 v4"
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{{intel title|Xeon E5-2683 v4}} | {{intel title|Xeon E5-2683 v4}} | ||
− | {{ | + | {{chip |
| name = Xeon E5-2683 v4 | | name = Xeon E5-2683 v4 | ||
| no image = Yes | | no image = Yes | ||
Line 10: | Line 10: | ||
| model number = E5-2683 v4 | | model number = E5-2683 v4 | ||
| part number = CM8066002023604 | | part number = CM8066002023604 | ||
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Server | | market = Server | ||
| first announced = June 20, 2016 | | first announced = June 20, 2016 | ||
Line 26: | Line 26: | ||
| turbo frequency = Yes | | turbo frequency = Yes | ||
| turbo frequency1 = 3,000 MHz | | turbo frequency1 = 3,000 MHz | ||
− | | turbo frequency2 = | + | | turbo frequency2 = 3,000 MHz |
+ | | turbo frequency3 = 2,800 MHz | ||
+ | | turbo frequency4 = 2,700 MHz | ||
+ | | turbo frequency5 = 2,600 MHz | ||
+ | | turbo frequency6 = 2,600 MHz | ||
+ | | turbo frequency7 = 2,600 MHz | ||
+ | | turbo frequency8 = 2,600 MHz | ||
+ | | turbo frequency9 = 2,600 MHz | ||
+ | | turbo frequency10 = 2,600 MHz | ||
+ | | turbo frequency11 = 2,600 MHz | ||
+ | | turbo frequency12 = 2,600 MHz | ||
+ | | turbo frequency13 = 2,600 MHz | ||
+ | | turbo frequency14 = 2,600 MHz | ||
+ | | turbo frequency15 = 2,600 MHz | ||
+ | | turbo frequency16 = 2,600 MHz | ||
| bus type = QPI | | bus type = QPI | ||
| bus speed = 4,800 MHz | | bus speed = 4,800 MHz | ||
Line 34: | Line 48: | ||
| s-spec = SR2JT | | s-spec = SR2JT | ||
| s-spec es = | | s-spec es = | ||
− | | s-spec qs = | + | | s-spec qs = QK7K |
| cpuid = 406F1 | | cpuid = 406F1 | ||
+ | | isa family = x86 | ||
+ | | isa = x86-64 | ||
| microarch = Broadwell | | microarch = Broadwell | ||
| platform = Grantley EP 2S | | platform = Grantley EP 2S | ||
Line 54: | Line 70: | ||
| max memory = 1,536 GiB | | max memory = 1,536 GiB | ||
− | + | ||
| v core = 1.82 V | | v core = 1.82 V | ||
| v core tolerance = | | v core tolerance = | ||
Line 104: | Line 120: | ||
|l3 desc=20-way set associative | |l3 desc=20-way set associative | ||
|l3 extra=(shared, per core, write-back) | |l3 extra=(shared, per core, write-back) | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This microprocessor has no [[integrated graphics processing unit]]. | ||
+ | |||
+ | == Memory controller == | ||
+ | {{integrated memory controller | ||
+ | | type = DDR4-2400 | ||
+ | | controllers = 1 | ||
+ | | channels = 4 | ||
+ | | ecc support = Yes | ||
+ | | max bandwidth = 71.53 GiB/s | ||
+ | | bandwidth schan = 17.88 GiB/s | ||
+ | | bandwidth dchan = 35.76 GiB/s | ||
+ | | max memory = 1,536 GiB | ||
+ | | pae = 46 bit | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 40 | ||
+ | | pcie config = x4 | ||
+ | | pcie config 1 = x8 | ||
+ | | pcie config 2 = x16 | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | | em64t = Yes | ||
+ | | nx = Yes | ||
+ | | txt = Yes | ||
+ | | tsx = Yes | ||
+ | | vpro = Yes | ||
+ | | ht = Yes | ||
+ | | tbt1 = | ||
+ | | tbt2 = Yes | ||
+ | | tbmt3 = | ||
+ | | bpt = | ||
+ | | vt-x = Yes | ||
+ | | vt-d = Yes | ||
+ | | ept = Yes | ||
+ | | mmx = Yes | ||
+ | | sse = Yes | ||
+ | | sse2 = Yes | ||
+ | | sse3 = Yes | ||
+ | | ssse3 = Yes | ||
+ | | sse4.1 = Yes | ||
+ | | sse4.2 = Yes | ||
+ | | aes = Yes | ||
+ | | pclmul = Yes | ||
+ | | avx = Yes | ||
+ | | avx2 = Yes | ||
+ | | bmi = Yes | ||
+ | | bmi1 = Yes | ||
+ | | bmi2 = Yes | ||
+ | | f16c = Yes | ||
+ | | fma3 = Yes | ||
+ | | mpx = | ||
+ | | sgx = | ||
+ | | eist = Yes | ||
+ | | secure key = Yes | ||
+ | | os guard = Yes | ||
+ | | intel at = | ||
+ | | intel ipt = | ||
}} | }} |
Latest revision as of 16:28, 13 December 2017
Edit Values | |
Xeon E5-2683 v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-2683 v4 |
Part Number | CM8066002023604 |
S-Spec | SR2JT QK7K (QS) |
Market | Server |
Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
Release Price | $1846.00 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-2000 |
Locked | Yes |
Frequency | 2,100 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3,000 MHz (1 core), 3,000 MHz (2 cores), 2,800 MHz (3 cores), 2,700 MHz (4 cores), 2,600 MHz (5 cores), 2,600 MHz (6 cores), 2,600 MHz (7 cores), 2,600 MHz (8 cores), 2,600 MHz (9 cores), 2,600 MHz (10 cores), 2,600 MHz (11 cores), 2,600 MHz (12 cores), 2,600 MHz (13 cores), 2,600 MHz (14 cores), 2,600 MHz (15 cores), 2,600 MHz (16 cores) |
Bus type | QPI |
Bus speed | 4,800 MHz |
Bus rate | 2 × 9.6 GT/s |
Clock multiplier | 21 |
CPUID | 406F1 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Platform | Grantley EP 2S |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | B0 |
Process | 14 nm |
Transistors | 7,200,000,000 |
Technology | CMOS |
Die | 456.12 mm² |
Word Size | 64 bit |
Cores | 16 |
Threads | 32 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 120 W |
Tcase | 0 °C – 84 °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-2683 v4 is a 64-bit hexadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for segment-optimized 2S environments (1U Square form factors). Operating at 2.1 GHz with a turbo boost frequency of 3 GHz for a single active core, this MPU has a TDP of 120 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 512 KiB 524,288 B 0.5 MiB |
16x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 512 KiB 524,288 B 0.5 MiB |
16x32 KiB 8-way set associative (per core, write-back) |
L2$ | 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB |
16x256 KiB 8-way set associative (per core, write-back) |
L3$ | 40 MiB 40,960 KiB 41,943,040 B 0.0391 GiB |
16x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2400 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 71.53 GiB/s |
Bandwidth (single) | 17.88 GiB/s |
Bandwidth (dual) | 35.76 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions[edit]
Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Xeon E5-2683 v4 - Intel"
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 40 MiB (40,960 KiB, 41,943,040 B, 0.0391 GiB) + |