From WikiChip
Difference between revisions of "intel/xeon e5/e5-2699a v4"
(18 intermediate revisions by 6 users not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Xeon E5-2699A v4}} | {{intel title|Xeon E5-2699A v4}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Xeon E5-2699A v4 |
− | | no image | + | |no image=Yes |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | + | |model number=E5-2699A v4 | |
− | | designer | + | |part number=CM8066003197800 |
− | | manufacturer | + | |s-spec=SR30Y |
− | | model number | + | |s-spec qs=QLPM |
− | | part number | + | |market=Server |
− | | | + | |first announced=October 25, 2016 |
− | | | + | |first launched=October 25, 2016 |
− | + | |release price=$4938 | |
− | | market | + | |family=Xeon E5 |
− | | first announced | + | |series=E5-2000 |
− | | first launched | + | |locked=Yes |
− | + | |frequency=2,400 MHz | |
− | + | |turbo frequency1=3,600 MHz | |
− | | release price | + | |turbo frequency2=3,600 MHz |
− | + | |turbo frequency3=3,400 MHz | |
− | | family | + | |turbo frequency4=3,300 MHz |
− | | series | + | |turbo frequency5=3,200 MHz |
− | | locked | + | |turbo frequency6=3,100 MHz |
− | | frequency | + | |turbo frequency7=3,000 MHz |
− | | turbo | + | |turbo frequency8=3,000 MHz |
− | | turbo | + | |turbo frequency9=3,000 MHz |
− | | turbo | + | |turbo frequency10=3,000 MHz |
− | | bus type | + | |turbo frequency11=3,000 MHz |
− | | bus speed | + | |turbo frequency12=3,000 MHz |
− | | bus rate | + | |turbo frequency13=3,000 MHz |
− | + | |turbo frequency14=3,000 MHz | |
− | | clock multiplier | + | |turbo frequency15=3,000 MHz |
− | + | |turbo frequency16=3,000 MHz | |
− | + | |turbo frequency17=3,000 MHz | |
− | + | |turbo frequency18=3,000 MHz | |
− | | cpuid | + | |turbo frequency19=3,000 MHz |
− | + | |turbo frequency20=3,000 MHz | |
− | | microarch | + | |turbo frequency21=3,000 MHz |
− | | platform | + | |turbo frequency22=3,000 MHz |
− | | chipset | + | |turbo frequency=Yes |
− | | core name | + | |bus type=QPI |
− | | core family | + | |bus speed=4,800 MHz |
− | | core model | + | |bus links=2 |
− | | core stepping | + | |bus rate=9.6 GT/s |
− | | process | + | |clock multiplier=24 |
− | | transistors | + | |cpuid=406F1 |
− | | technology | + | |microarch=Broadwell |
− | + | |platform=Grantley EP 2S | |
− | | word size | + | |chipset=C610 Series |
− | | core count | + | |core name=Broadwell EP |
− | | thread count | + | |core family=6 |
− | + | |core model=4F | |
− | | max memory | + | |core stepping=B0 |
− | + | |process=14 nm | |
− | | | + | |transistors=7,200,000,000 |
− | | v core | + | |technology=CMOS |
− | + | |word size=64 bit | |
− | | v io | + | |core count=22 |
− | | v io tolerance | + | |thread count=44 |
− | + | |max memory=1,536 GiB | |
− | | tdp | + | |max cpus=2 |
− | + | |v core=1.82 V | |
− | + | |v io=1.2 V | |
− | + | |v io tolerance=3% | |
− | + | |tdp=145 W | |
− | + | |tcase min=0 °C | |
− | + | |tcase max=? °C | |
− | | tcase min | + | |tstorage min=-25 °C |
− | | tcase max | + | |tstorage max=125 °C |
− | | tstorage min | + | |die size=456.12 mm² |
− | | tstorage max | + | |packaging=Yes |
− | + | |package 0=FCLGA-2011-v3 | |
− | | packaging | + | |package 0 type=FCLGA |
− | | package 0 | + | |package 0 pins=2011 |
− | | package 0 type | + | |package 0 pitch=0.8814 mm |
− | | package 0 pins | + | |package 0 width=52.5 mm |
− | | package 0 pitch | + | |package 0 length=45.0 mm |
− | | package 0 width | + | |package 0 height=5.316 mm |
− | | package 0 length | + | |socket 0=LGA-2011-v3 |
− | | package 0 height | + | |socket 0 type=LGA |
− | | socket 0 | ||
− | | socket 0 type | ||
}} | }} | ||
The '''Xeon E5-2699A v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.4 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | The '''Xeon E5-2699A v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.4 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | ||
Line 104: | Line 102: | ||
|l3 desc=20-way set associative | |l3 desc=20-way set associative | ||
|l3 extra=(shared, per core, write-back) | |l3 extra=(shared, per core, write-back) | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This microprocessor has no [[integrated graphics processing unit]]. | ||
+ | |||
+ | == Memory controller == | ||
+ | {{integrated memory controller | ||
+ | | type = DDR4-2400 | ||
+ | | controllers = 1 | ||
+ | | channels = 4 | ||
+ | | ecc support = Yes | ||
+ | | max bandwidth = 71.53 GiB/s | ||
+ | | bandwidth schan = 17.88 GiB/s | ||
+ | | bandwidth dchan = 35.76 GiB/s | ||
+ | | max memory = 1,536 GiB | ||
+ | | pae = 46 bit | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 40 | ||
+ | | pcie config = x4 | ||
+ | | pcie config 1 = x8 | ||
+ | | pcie config 2 = x16 | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=No | ||
+ | |fpu=No | ||
+ | |x8616=No | ||
+ | |x8632=No | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=No | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=No | ||
+ | |sse4a=No | ||
+ | |sse_gfni=No | ||
+ | |avx=Yes | ||
+ | |avx_gfni=No | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx512vnni=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |avx512gfni=No | ||
+ | |avx512vaes=No | ||
+ | |avx512vbmi2=No | ||
+ | |avx512bitalg=No | ||
+ | |avx512vpclmulqdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=Yes | ||
+ | |bfloat16=No | ||
+ | |tbt1=Yes | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=Yes | ||
+ | |tvb=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |tme=No | ||
+ | |mktme=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=Yes | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=Yes | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |dlboost=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
+ | |em64t=Yes | ||
+ | |vt-x=Yes | ||
+ | |vt-d=Yes | ||
+ | |sse4_1=Yes | ||
+ | |sse4_2=Yes | ||
+ | |pclmul=Yes | ||
+ | |bmi=Yes | ||
+ | |secure key=Yes | ||
+ | |os guard=Yes | ||
+ | }} | ||
+ | |||
+ | == Benchmarks == | ||
+ | {{benchmarks main | ||
+ | | | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00013.html|test_timestamp=2016-12-10 10:49:26-0500|chip_count=2|core_count=44|copies_count=88|vendor=Fujitsu|system=PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz|SPECrate2017_fp_base=149|SPECrate2017_fp_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00014.html|test_timestamp=2016-12-11 03:26:03-0500|chip_count=2|core_count=44|copies_count=88|vendor=Fujitsu|system=PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz|SPECrate2017_int_base=164|SPECrate2017_int_peak=}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00021.html|test_timestamp=2016-12-07 11:54:06-0500|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL360 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)|SPECrate2017_fp_base=149|SPECrate2017_fp_peak=149}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00022.html|test_timestamp=2016-12-09 13:58:28-0500|chip_count=2|core_count=44|copies_count=88|vendor=HPE|system=ProLiant DL380 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)|SPECrate2017_fp_base=147|SPECrate2017_fp_peak=148}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q3/cpu2017-20170828-00068.html|test_timestamp=2017-08-22 07:20:59-0400|chip_count=2|core_count=44|copies_count=88|vendor=Supermicro|system=SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)|SPECrate2017_int_base=162|SPECrate2017_int_peak=173}} | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q3/cpu2017-20170828-00069.html|test_timestamp=2017-08-22 20:56:45-0400|chip_count=2|core_count=44|copies_count=88|vendor=Supermicro|system=SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)|SPECrate2017_fp_base=149|SPECrate2017_fp_peak=149}} | ||
}} | }} |
Latest revision as of 16:28, 14 November 2023
Edit Values | |
Xeon E5-2699A v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-2699A v4 |
Part Number | CM8066003197800 |
S-Spec | SR30Y QLPM (QS) |
Market | Server |
Introduction | October 25, 2016 (announced) October 25, 2016 (launched) |
Release Price | $4938 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-2000 |
Locked | Yes |
Frequency | 2,400 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3,600 MHz (1 core), 3,600 MHz (2 cores), 3,400 MHz (3 cores), 3,300 MHz (4 cores), 3,200 MHz (5 cores), 3,100 MHz (6 cores), 3,000 MHz (7 cores), 3,000 MHz (8 cores), 3,000 MHz (9 cores), 3,000 MHz (10 cores), 3,000 MHz (11 cores), 3,000 MHz (12 cores), 3,000 MHz (13 cores), 3,000 MHz (14 cores), 3,000 MHz (15 cores), 3,000 MHz (16 cores), 3,000 MHz (17 cores), 3,000 MHz (18 cores), 3,000 MHz (19 cores), 3,000 MHz (20 cores), 3,000 MHz (21 cores), 3,000 MHz (22 cores) |
Bus type | QPI |
Bus speed | 4,800 MHz |
Bus rate | 2 × 9.6 GT/s |
Clock multiplier | 24 |
CPUID | 406F1 |
Microarchitecture | |
Microarchitecture | Broadwell |
Platform | Grantley EP 2S |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | B0 |
Process | 14 nm |
Transistors | 7,200,000,000 |
Technology | CMOS |
Die | 456.12 mm² |
Word Size | 64 bit |
Cores | 22 |
Threads | 44 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 145 W |
Tcase | 0 °C – ? °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-2699A v4 is a 64-bit docosa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.4 GHz with a turbo boost frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 704 KiB 720,896 B 0.688 MiB |
22x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 704 KiB 720,896 B 0.688 MiB |
22x32 KiB 8-way set associative (per core, write-back) |
L2$ | 5.5 MiB 5,632 KiB 5,767,168 B 0.00537 GiB |
22x256 KiB 8-way set associative (per core, write-back) |
L3$ | 55 MiB 56,320 KiB 57,671,680 B 0.0537 GiB |
22x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2400 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 71.53 GiB/s |
Bandwidth (single) | 17.88 GiB/s |
Bandwidth (dual) | 35.76 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions[edit]
Expansion Options
|
||||||||
|
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
Benchmarks[edit]
Test: SPEC CPU2017
Tested: 2016-12-10 10:49:26-0500
Chips: 2, Cores: 44, Copies: 88
Tested: 2016-12-10 10:49:26-0500
Chips: 2, Cores: 44, Copies: 88
Vendor: Fujitsu
System: PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz
System: PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz
SPECrate2017_fp_base: 149
Test: SPEC CPU2017
Tested: 2016-12-11 03:26:03-0500
Chips: 2, Cores: 44, Copies: 88
Tested: 2016-12-11 03:26:03-0500
Chips: 2, Cores: 44, Copies: 88
Vendor: Fujitsu
System: PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz
System: PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz
SPECrate2017_int_base: 164
Test: SPEC CPU2017
Tested: 2016-12-07 11:54:06-0500
Chips: 2, Cores: 44, Copies: 88
Tested: 2016-12-07 11:54:06-0500
Chips: 2, Cores: 44, Copies: 88
Vendor: HPE
System: ProLiant DL360 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)
System: ProLiant DL360 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)
SPECrate2017_fp_base: 149
SPECrate2017_fp_peak: 149
Test: SPEC CPU2017
Tested: 2016-12-09 13:58:28-0500
Chips: 2, Cores: 44, Copies: 88
Tested: 2016-12-09 13:58:28-0500
Chips: 2, Cores: 44, Copies: 88
Vendor: HPE
System: ProLiant DL380 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)
System: ProLiant DL380 Gen9 (2.40 GHz, Intel Xeon E5-2699A v4)
SPECrate2017_fp_base: 147
SPECrate2017_fp_peak: 148
Test: SPEC CPU2017
Tested: 2017-08-22 07:20:59-0400
Chips: 2, Cores: 44, Copies: 88
Tested: 2017-08-22 07:20:59-0400
Chips: 2, Cores: 44, Copies: 88
Vendor: Supermicro
System: SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)
System: SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)
SPECrate2017_int_base: 162
SPECrate2017_int_peak: 173
Test: SPEC CPU2017
Tested: 2017-08-22 20:56:45-0400
Chips: 2, Cores: 44, Copies: 88
Tested: 2017-08-22 20:56:45-0400
Chips: 2, Cores: 44, Copies: 88
Vendor: Supermicro
System: SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)
System: SuperServer 2028U-TR4T+ (X10DRU-i+, Intel Xeon E5-2699A v4)
SPECrate2017_fp_base: 149
SPECrate2017_fp_peak: 149
Facts about "Xeon E5-2699A v4 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-2699A v4 - Intel#io +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel + and Xeon E5-2699A v4 - Intel + |
base frequency | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
bus links | 2 + |
bus rate | 9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) + |
bus speed | 4,800 MHz (4.8 GHz, 4,800,000 kHz) + |
bus type | QPI + |
chipset | C610 Series + |
clock multiplier | 24 + |
core count | 22 + |
core family | 6 + |
core model | 4F + |
core name | Broadwell EP + |
core stepping | B0 + |
core voltage | 1.82 V (18.2 dV, 182 cV, 1,820 mV) + |
cpuid | 406F1 + |
designer | Intel + |
die area | 456.12 mm² (0.707 in², 4.561 cm², 456,120,000 µm²) + |
family | Xeon E5 + |
first announced | October 25, 2016 + |
first launched | October 25, 2016 + |
full page name | intel/xeon e5/e5-2699a v4 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 1.0 +, Turbo Boost Technology 2.0 +, Turbo Boost Max Technology 3.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost max technology 3 0 | true + |
has intel turbo boost technology 1 0 | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
io voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
io voltage tolerance | 3% + |
l1d$ description | 8-way set associative + |
l1d$ size | 704 KiB (720,896 B, 0.688 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 704 KiB (720,896 B, 0.688 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 5.5 MiB (5,632 KiB, 5,767,168 B, 0.00537 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 55 MiB (56,320 KiB, 57,671,680 B, 0.0537 GiB) + |
ldate | October 25, 2016 + |
manufacturer | Intel + |
market segment | Server + |
max cpu count | 2 + |
max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
max pcie lanes | 40 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Broadwell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | E5-2699A v4 + |
name | Xeon E5-2699A v4 + |
part number | CM8066003197800 + |
platform | Grantley EP 2S + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 4,938.00 (€ 4,444.20, £ 3,999.78, ¥ 510,243.54) + |
s-spec | SR30Y + |
s-spec (qs) | QLPM + |
series | E5-2000 + |
smp max ways | 2 + |
tdp | 145 W (145,000 mW, 0.194 hp, 0.145 kW) + |
technology | CMOS + |
thread count | 44 + |
transistor count | 7,200,000,000 + |
turbo frequency (10 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (11 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (12 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (13 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (14 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (15 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (16 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (17 cores) | 3,000 MHz + |
turbo frequency (18 cores) | 3,000 MHz + |
turbo frequency (19 cores) | 3,000 MHz + |
turbo frequency (1 core) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
turbo frequency (20 cores) | 3,000 MHz + |
turbo frequency (21 cores) | 3,000 MHz + |
turbo frequency (22 cores) | 3,000 MHz + |
turbo frequency (2 cores) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
turbo frequency (3 cores) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
turbo frequency (4 cores) | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
turbo frequency (5 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (6 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (7 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (8 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (9 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |