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Difference between revisions of "intel/xeon e5/e5-2697a v4"
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{{intel title|Xeon E5-2697A v4}} | {{intel title|Xeon E5-2697A v4}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Xeon E5-2697A v4 |
− | | no image | + | |no image=Yes |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | + | |model number=E5-2697A v4 | |
− | | designer | + | |part number=CM8066002645900 |
− | | manufacturer | + | |s-spec=SR2K1 |
− | | model number | + | |s-spec qs=QK7S |
− | | part number | + | |market=Server |
− | | | + | |first announced=June 20, 2016 |
− | | | + | |first launched=June 20, 2016 |
− | + | |release price=$2891.00 | |
− | | market | + | |family=Xeon E5 |
− | | first announced | + | |series=E5-2000 |
− | | first launched | + | |locked=Yes |
− | + | |frequency=2,600 MHz | |
− | + | |turbo frequency1=3,600 MHz | |
− | | release price | + | |turbo frequency2=3,600 MHz |
− | + | |turbo frequency3=3,400 MHz | |
− | | family | + | |turbo frequency4=3,300 MHz |
− | | series | + | |turbo frequency5=3,200 MHz |
− | | locked | + | |turbo frequency6=3,100 MHz |
− | | frequency | + | |turbo frequency7=3,100 MHz |
− | | turbo | + | |turbo frequency8=3,100 MHz |
− | | turbo | + | |turbo frequency9=3,100 MHz |
− | | turbo | + | |turbo frequency10=3,100 MHz |
− | | bus type | + | |turbo frequency11=3,100 MHz |
− | | bus speed | + | |turbo frequency12=3,100 MHz |
− | | bus rate | + | |turbo frequency13=3,100 MHz |
− | + | |turbo frequency14=3,100 MHz | |
− | | clock multiplier | + | |turbo frequency15=3,100 MHz |
− | | | + | |turbo frequency16=3,100 MHz |
− | | | + | |turbo frequency=Yes |
− | + | |bus type=QPI | |
− | | | + | |bus speed=4,800 MHz |
− | + | |bus links=2 | |
− | | microarch | + | |bus rate=9.6 GT/s |
− | | platform | + | |clock multiplier=26 |
− | | chipset | + | |cpuid=406F1 |
− | | core name | + | |isa=x86-64 |
− | | core family | + | |isa family=x86 |
− | | core model | + | |microarch=Broadwell |
− | | core stepping | + | |platform=Grantley EP 2S |
− | | process | + | |chipset=C610 Series |
− | | transistors | + | |core name=Broadwell EP |
− | | technology | + | |core family=6 |
− | + | |core model=4F | |
− | | word size | + | |core stepping=B0 |
− | | core count | + | |process=14 nm |
− | | thread count | + | |transistors=7,200,000,000 |
− | + | |technology=CMOS | |
− | | max memory | + | |word size=64 bit |
− | + | |core count=16 | |
− | | | + | |thread count=32 |
− | | v core | + | |max memory=1,536 GiB |
− | + | |max cpus=2 | |
− | | v io | + | |v core=1.82 V |
− | | v io tolerance | + | |v io=1.2 V |
− | + | |v io tolerance=3% | |
− | | tdp | + | |tdp=145 W |
− | + | |tcase min=0 °C | |
− | + | |tcase max=78 °C | |
− | + | |tstorage min=-25 °C | |
− | + | |tstorage max=125 °C | |
− | + | |die size=456.12 mm² | |
− | + | |packaging=Yes | |
− | | tcase min | + | |package 0=FCLGA-2011-v3 |
− | | tcase max | + | |package 0 type=FCLGA |
− | | tstorage min | + | |package 0 pins=2011 |
− | | tstorage max | + | |package 0 pitch=0.8814 mm |
− | + | |package 0 width=52.5 mm | |
− | | packaging | + | |package 0 length=45.0 mm |
− | | package 0 | + | |package 0 height=5.316 mm |
− | | package 0 type | + | |socket 0=LGA-2011-v3 |
− | | package 0 pins | + | |socket 0 type=LGA |
− | | package 0 pitch | ||
− | | package 0 width | ||
− | | package 0 length | ||
− | | package 0 height | ||
− | | socket 0 | ||
− | | socket 0 type | ||
}} | }} | ||
The '''Xeon E5-2697A v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.6 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | The '''Xeon E5-2697A v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.6 GHz with a {{intel|turbo boost}} frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | ||
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|l3 desc=20-way set associative | |l3 desc=20-way set associative | ||
|l3 extra=(shared, per core, write-back) | |l3 extra=(shared, per core, write-back) | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This microprocessor has no [[integrated graphics processing unit]]. | ||
+ | |||
+ | == Memory controller == | ||
+ | {{integrated memory controller | ||
+ | | type = DDR4-2400 | ||
+ | | controllers = 1 | ||
+ | | channels = 4 | ||
+ | | ecc support = Yes | ||
+ | | max bandwidth = 71.53 GiB/s | ||
+ | | bandwidth schan = 17.88 GiB/s | ||
+ | | bandwidth dchan = 35.76 GiB/s | ||
+ | | max memory = 1,536 GiB | ||
+ | | pae = 46 bit | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 40 | ||
+ | | pcie config = x4 | ||
+ | | pcie config 1 = x8 | ||
+ | | pcie config 2 = x16 | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | | em64t = Yes | ||
+ | | nx = Yes | ||
+ | | txt = Yes | ||
+ | | tsx = Yes | ||
+ | | vpro = Yes | ||
+ | | ht = Yes | ||
+ | | tbt1 = | ||
+ | | tbt2 = Yes | ||
+ | | tbmt3 = | ||
+ | | bpt = | ||
+ | | vt-x = Yes | ||
+ | | vt-d = Yes | ||
+ | | ept = Yes | ||
+ | | mmx = Yes | ||
+ | | sse = Yes | ||
+ | | sse2 = Yes | ||
+ | | sse3 = Yes | ||
+ | | ssse3 = Yes | ||
+ | | sse4.1 = Yes | ||
+ | | sse4.2 = Yes | ||
+ | | aes = Yes | ||
+ | | pclmul = Yes | ||
+ | | avx = Yes | ||
+ | | avx2 = Yes | ||
+ | | bmi = Yes | ||
+ | | bmi1 = Yes | ||
+ | | bmi2 = Yes | ||
+ | | f16c = Yes | ||
+ | | fma3 = Yes | ||
+ | | mpx = | ||
+ | | sgx = | ||
+ | | eist = Yes | ||
+ | | secure key = Yes | ||
+ | | os guard = Yes | ||
+ | | intel at = | ||
+ | | intel ipt = | ||
}} | }} |
Latest revision as of 21:46, 2 February 2024
Edit Values | |
Xeon E5-2697A v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-2697A v4 |
Part Number | CM8066002645900 |
S-Spec | SR2K1 QK7S (QS) |
Market | Server |
Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
Release Price | $2891.00 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-2000 |
Locked | Yes |
Frequency | 2,600 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3,600 MHz (1 core), 3,600 MHz (2 cores), 3,400 MHz (3 cores), 3,300 MHz (4 cores), 3,200 MHz (5 cores), 3,100 MHz (6 cores), 3,100 MHz (7 cores), 3,100 MHz (8 cores), 3,100 MHz (9 cores), 3,100 MHz (10 cores), 3,100 MHz (11 cores), 3,100 MHz (12 cores), 3,100 MHz (13 cores), 3,100 MHz (14 cores), 3,100 MHz (15 cores), 3,100 MHz (16 cores) |
Bus type | QPI |
Bus speed | 4,800 MHz |
Bus rate | 2 × 9.6 GT/s |
Clock multiplier | 26 |
CPUID | 406F1 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Platform | Grantley EP 2S |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | B0 |
Process | 14 nm |
Transistors | 7,200,000,000 |
Technology | CMOS |
Die | 456.12 mm² |
Word Size | 64 bit |
Cores | 16 |
Threads | 32 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 145 W |
Tcase | 0 °C – 78 °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-2697A v4 is a 64-bit hexadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for segment-optimized 2S environments (2U Square form factors). Operating at 2.6 GHz with a turbo boost frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 512 KiB 524,288 B 0.5 MiB |
16x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 512 KiB 524,288 B 0.5 MiB |
16x32 KiB 8-way set associative (per core, write-back) |
L2$ | 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB |
16x256 KiB 8-way set associative (per core, write-back) |
L3$ | 40 MiB 40,960 KiB 41,943,040 B 0.0391 GiB |
16x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2400 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 71.53 GiB/s |
Bandwidth (single) | 17.88 GiB/s |
Bandwidth (dual) | 35.76 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions[edit]
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Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon E5-2697A v4 - Intel"
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 40 MiB (40,960 KiB, 41,943,040 B, 0.0391 GiB) + |