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Difference between revisions of "intel/xeon e5/e5-2620 v4"
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{{intel title|Xeon E5-2620 v4}}
 
{{intel title|Xeon E5-2620 v4}}
−
{{mpu
+
{{chip
 
| name                = Xeon E5-2620 v4
 
| name                = Xeon E5-2620 v4
 
| no image            = Yes
 
| no image            = Yes
Line 10: Line 10:
 
| model number        = E5-2620 v4
 
| model number        = E5-2620 v4
 
| part number        = CM8066002032201
 
| part number        = CM8066002032201
−
| part number 1       = BX80660E52620V4
+
| part number 2       = BX80660E52620V4
−
| part number 2      =
 
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Server
 
| market              = Server
 
| first announced    = June 20, 2016
 
| first announced    = June 20, 2016
Line 26: Line 26:
 
| turbo frequency    = Yes
 
| turbo frequency    = Yes
 
| turbo frequency1    = 3,000 MHz
 
| turbo frequency1    = 3,000 MHz
−
| turbo frequency2    =  
+
| turbo frequency2    = 3,000 MHz
 +
| turbo frequency3    = 2,800 MHz
 +
| turbo frequency4    = 2,700 MHz
 +
| turbo frequency5    = 2,600 MHz
 +
| turbo frequency6    = 2,500 MHz
 +
| turbo frequency7    = 2,400 MHz
 +
| turbo frequency8    = 2,300 MHz
 
| bus type            = QPI
 
| bus type            = QPI
 
| bus speed          = 4,000 MHz
 
| bus speed          = 4,000 MHz
Line 34: Line 40:
 
| s-spec              = SR2R6
 
| s-spec              = SR2R6
 
| s-spec es          =  
 
| s-spec es          =  
−
| s-spec qs          =  
+
| s-spec qs          = QKES
 +
| s-spec qs 2        = QKRG
 
| cpuid              = 406F1
 
| cpuid              = 406F1
  
 +
| isa family          = x86
 +
| isa                = x86-64
 
| microarch          = Broadwell
 
| microarch          = Broadwell
 
| platform            = Grantley EP 2S
 
| platform            = Grantley EP 2S
Line 42: Line 51:
 
| core name          = Broadwell EP
 
| core name          = Broadwell EP
 
| core family        = 6
 
| core family        = 6
−
| core model          = 15
+
| core model          = 4F
 
| core stepping      = R0
 
| core stepping      = R0
 
| process            = 14 nm
 
| process            = 14 nm
Line 54: Line 63:
 
| max memory          = 1,536 GiB
 
| max memory          = 1,536 GiB
  
−
| electrical          = Yes
+
 
 
| v core              = 1.82 V
 
| v core              = 1.82 V
 
| v core tolerance    =  
 
| v core tolerance    =  
Line 84: Line 93:
 
}}
 
}}
 
The '''Xeon E5-2620 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 2S environments (1U square form factor). Operating at 2.1 GHz with a {{intel|turbo boost}} frequency of 3 GHz for a single active core, this MPU has a TDP of 85 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
 
The '''Xeon E5-2620 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 2S environments (1U square form factor). Operating at 2.1 GHz with a {{intel|turbo boost}} frequency of 3 GHz for a single active core, this MPU has a TDP of 85 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
 +
 +
== Cache ==
 +
{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}}
 +
{{cache info
 +
|l1i cache=256 KiB
 +
|l1i break=8x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1i extra=(per core, write-back)
 +
|l1d cache=256 KiB
 +
|l1d break=8x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d extra=(per core, write-back)
 +
|l2 cache=2 MiB
 +
|l2 break=8x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 extra=(per core, write-back)
 +
|l3 cache=20 MiB
 +
|l3 break=8x2.5 MiB
 +
|l3 desc=20-way set associative
 +
|l3 extra=(shared, per core, write-back)
 +
}}
 +
 +
== Graphics ==
 +
This microprocessor has no [[integrated graphics processing unit]].
 +
 +
== Memory controller ==
 +
{{integrated memory controller
 +
| type              = DDR4-2133
 +
| controllers        = 1
 +
| channels          = 4
 +
| ecc support        = Yes
 +
| max bandwidth      = 63.58 GiB/s
 +
| bandwidth schan    = 15.89 GiB/s
 +
| bandwidth dchan    = 31.79 GiB/s
 +
| max memory        = 1,536 GiB
 +
| pae                = 46 bit
 +
}}
 +
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 40
 +
| pcie config        = x4
 +
| pcie config 1      = x8
 +
| pcie config 2      = x16
 +
}}
 +
 +
== Features ==
 +
{{x86 features
 +
| em64t      = Yes
 +
| nx          = Yes
 +
| txt        = Yes
 +
| tsx        = Yes
 +
| vpro        = Yes
 +
| ht          = Yes
 +
| tbt1        =
 +
| tbt2        = Yes
 +
| tbmt3      =
 +
| bpt        =
 +
| vt-x        = Yes
 +
| vt-d        = Yes
 +
| ept        = Yes
 +
| mmx        = Yes
 +
| sse        = Yes
 +
| sse2        = Yes
 +
| sse3        = Yes
 +
| ssse3      = Yes
 +
| sse4.1      = Yes
 +
| sse4.2      = Yes
 +
| aes        = Yes
 +
| pclmul      = Yes
 +
| avx        = Yes
 +
| avx2        = Yes
 +
| bmi        = Yes
 +
| bmi1        = Yes
 +
| bmi2        = Yes
 +
| f16c        = Yes
 +
| fma3        = Yes
 +
| mpx        =
 +
| sgx        =
 +
| eist        = Yes
 +
| secure key  = Yes
 +
| os guard    = Yes
 +
| intel at    =
 +
| intel ipt  =
 +
}}
 +
 +
== Benchmarks ==
 +
{{benchmarks main
 +
|
 +
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00015.html|test_timestamp=2017-02-28 06:34:33-0500|chip_count=2|core_count=16|copies_count=32|vendor=H3C|system=H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)|SPECrate2017_fp_base=76|SPECrate2017_fp_peak=77.7}}
 +
{{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00016.html|test_timestamp=2016-12-10 07:53:08-0500|chip_count=2|core_count=16|copies_count=32|vendor=H3C|system=H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)|SPECrate2017_int_base=53.5|SPECrate2017_int_peak=59.4}}
 +
}}

Latest revision as of 15:27, 13 December 2017

Edit Values
Xeon E5-2620 v4
General Info
DesignerIntel
ManufacturerIntel
Model NumberE5-2620 v4
Part NumberCM8066002032201,
BX80660E52620V4
S-SpecSR2R6
QKES (QS), QKRG (QS)
MarketServer
IntroductionJune 20, 2016 (announced)
June 20, 2016 (launched)
Release Price$417.00
ShopAmazon
General Specs
FamilyXeon E5
SeriesE5-2000
LockedYes
Frequency2,100 MHz
Turbo FrequencyYes
Turbo Frequency3,000 MHz (1 core),
3,000 MHz (2 cores),
2,800 MHz (3 cores),
2,700 MHz (4 cores),
2,600 MHz (5 cores),
2,500 MHz (6 cores),
2,400 MHz (7 cores),
2,300 MHz (8 cores)
Bus typeQPI
Bus speed4,000 MHz
Bus rate2 × 8 GT/s
Clock multiplier21
CPUID406F1
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureBroadwell
PlatformGrantley EP 2S
ChipsetC610 Series
Core NameBroadwell EP
Core Family6
Core Model4F
Core SteppingR0
Process14 nm
Transistors3,200,000,000
TechnologyCMOS
Die246.24 mm²
Word Size64 bit
Cores8
Threads16
Max Memory1,536 GiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
Vcore1.82 V
VI/O1.2 V ± 3%
TDP85 W
Tcase0 °C – 74 °C
Tstorage-25 °C – 125 °C

The Xeon E5-2620 v4 is a 64-bit octa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for standard 2S environments (1U square form factor). Operating at 2.1 GHz with a turbo boost frequency of 3 GHz for a single active core, this MPU has a TDP of 85 W and is manufactured on a 14 nm process (based on Broadwell).

Cache[edit]

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 256 KiB
262,144 B
0.25 MiB
8x32 KiB 8-way set associative (per core, write-back)
L1D$ 256 KiB
262,144 B
0.25 MiB
8x32 KiB 8-way set associative (per core, write-back)
L2$ 2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
8x256 KiB 8-way set associative (per core, write-back)
L3$ 20 MiB
20,480 KiB
20,971,520 B
0.0195 GiB
8x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics[edit]

This microprocessor has no integrated graphics processing unit.

Memory controller[edit]

Integrated Memory Controller
Type DDR4-2133
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 63.58 GiB/s
Bandwidth (single) 15.89 GiB/s
Bandwidth (dual) 31.79 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes40
Configsx4, x16


Features[edit]

Benchmarks[edit]

[Edit Benchmarks]

Test: SPEC CPU2017
Tested: 2017-02-28 06:34:33-0500
Chips: 2, Cores: 16, Copies: 32
benchmarks.svg
Vendor: H3C
System: H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)
SPECrate2017_fp_base: 76
SPECrate2017_fp_peak: 77.7
Test: SPEC CPU2017
Tested: 2016-12-10 07:53:08-0500
Chips: 2, Cores: 16, Copies: 32
benchmarks.svg
Vendor: H3C
System: H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)
SPECrate2017_int_base: 53.5
SPECrate2017_int_peak: 59.4
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e5/e5-2620_v4&oldid=70982"
Facts about "Xeon E5-2620 v4 - Intel"
RDF feed
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description8-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description20-way set associative +
l3$ size40 MiB (40,960 KiB, 41,943,040 B, 0.0391 GiB) +