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Difference between revisions of "intel/xeon e5/e5-4667 v4"
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{{intel title|Xeon E5-4667 v4}} | {{intel title|Xeon E5-4667 v4}} | ||
− | {{ | + | {{chip |
| name = Xeon E5-4667 v4 | | name = Xeon E5-4667 v4 | ||
| no image = Yes | | no image = Yes | ||
Line 10: | Line 10: | ||
| model number = E5-4667 v4 | | model number = E5-4667 v4 | ||
| part number = CM8066002064600 | | part number = CM8066002064600 | ||
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Server | | market = Server | ||
| first announced = June 20, 2016 | | first announced = June 20, 2016 | ||
Line 18: | Line 18: | ||
| last order = | | last order = | ||
| last shipment = | | last shipment = | ||
+ | | release price = $5729 | ||
| family = Xeon E5 | | family = Xeon E5 | ||
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| s-spec = SR2SF | | s-spec = SR2SF | ||
| s-spec es = | | s-spec es = | ||
− | | s-spec qs = | + | | s-spec qs = QKSV |
| cpuid = 406F1 | | cpuid = 406F1 | ||
Line 41: | Line 42: | ||
| core name = Broadwell EP | | core name = Broadwell EP | ||
| core family = 6 | | core family = 6 | ||
− | | core model = | + | | core model = 4F |
| core stepping = B0 | | core stepping = B0 | ||
| process = 14 nm | | process = 14 nm | ||
Line 53: | Line 54: | ||
| max memory = 1,536 GiB | | max memory = 1,536 GiB | ||
− | + | ||
| v core = 1.82 V | | v core = 1.82 V | ||
| v core tolerance = | | v core tolerance = | ||
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}} | }} | ||
The '''Xeon E5-4667 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for high-performance dense 4S environments. Operating at 2.2 GHz with a {{intel|turbo boost}} frequency of 3 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | The '''Xeon E5-4667 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for high-performance dense 4S environments. Operating at 2.2 GHz with a {{intel|turbo boost}} frequency of 3 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}). | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}} | ||
+ | {{cache info | ||
+ | |l1i cache=576 KiB | ||
+ | |l1i break=18x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1i extra=(per core, write-back) | ||
+ | |l1d cache=576 KiB | ||
+ | |l1d break=18x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d extra=(per core, write-back) | ||
+ | |l2 cache=4.5 MiB | ||
+ | |l2 break=18x256 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 extra=(per core, write-back) | ||
+ | |l3 cache=45 MiB | ||
+ | |l3 break=18x2.5 MiB | ||
+ | |l3 desc=20-way set associative | ||
+ | |l3 extra=(shared, per core, write-back) | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This microprocessor has no [[integrated graphics processing unit]]. | ||
+ | |||
+ | == Memory controller == | ||
+ | {{integrated memory controller | ||
+ | | type = DDR4-2133 | ||
+ | | controllers = 1 | ||
+ | | channels = 4 | ||
+ | | ecc support = Yes | ||
+ | | max bandwidth = 63.58 GiB/s | ||
+ | | bandwidth schan = 15.89 GiB/s | ||
+ | | bandwidth dchan = 31.79 GiB/s | ||
+ | | max memory = 1,536 GiB | ||
+ | | pae = 46 bit | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 40 | ||
+ | | pcie config = x4 | ||
+ | | pcie config 1 = x8 | ||
+ | | pcie config 2 = x16 | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | | em64t = Yes | ||
+ | | nx = Yes | ||
+ | | txt = Yes | ||
+ | | tsx = Yes | ||
+ | | vpro = | ||
+ | | ht = Yes | ||
+ | | tbt1 = | ||
+ | | tbt2 = Yes | ||
+ | | tbmt3 = | ||
+ | | bpt = | ||
+ | | vt-x = Yes | ||
+ | | vt-d = Yes | ||
+ | | ept = Yes | ||
+ | | mmx = Yes | ||
+ | | sse = Yes | ||
+ | | sse2 = Yes | ||
+ | | sse3 = Yes | ||
+ | | ssse3 = Yes | ||
+ | | sse4.1 = Yes | ||
+ | | sse4.2 = Yes | ||
+ | | aes = Yes | ||
+ | | pclmul = Yes | ||
+ | | avx = Yes | ||
+ | | avx2 = Yes | ||
+ | | bmi = Yes | ||
+ | | bmi1 = Yes | ||
+ | | bmi2 = Yes | ||
+ | | f16c = Yes | ||
+ | | fma3 = Yes | ||
+ | | mpx = | ||
+ | | sgx = | ||
+ | | eist = Yes | ||
+ | | secure key = Yes | ||
+ | | os guard = Yes | ||
+ | | intel at = | ||
+ | | intel ipt = | ||
+ | }} |
Latest revision as of 16:28, 13 December 2017
Edit Values | |
Xeon E5-4667 v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-4667 v4 |
Part Number | CM8066002064600 |
S-Spec | SR2SF QKSV (QS) |
Market | Server |
Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
Release Price | $5729 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-4000 |
Locked | Yes |
Frequency | 2,200 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3,000 MHz (1 core) |
Bus type | QPI |
Bus speed | 4,800 MHz |
Bus rate | 2 × 9.6 GT/s |
Clock multiplier | 22 |
CPUID | 406F1 |
Microarchitecture | |
Microarchitecture | Broadwell |
Platform | Grantley EP 4S |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | B0 |
Process | 14 nm |
Transistors | 7,200,000,000 |
Technology | CMOS |
Die | 456.12 mm² |
Word Size | 64 bit |
Cores | 18 |
Threads | 36 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 4-Way (Multiprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 135 W |
Tcase | 0 °C – 87 °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-4667 v4 is a 64-bit octadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for high-performance dense 4S environments. Operating at 2.2 GHz with a turbo boost frequency of 3 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 576 KiB 589,824 B 0.563 MiB |
18x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 576 KiB 589,824 B 0.563 MiB |
18x32 KiB 8-way set associative (per core, write-back) |
L2$ | 4.5 MiB 4,608 KiB 4,718,592 B 0.00439 GiB |
18x256 KiB 8-way set associative (per core, write-back) |
L3$ | 45 MiB 46,080 KiB 47,185,920 B 0.0439 GiB |
18x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2133 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 63.58 GiB/s |
Bandwidth (single) | 15.89 GiB/s |
Bandwidth (dual) | 31.79 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions[edit]
![]() |
Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
![]() |
Supported x86 Extensions & Processor Features
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Facts about "Xeon E5-4667 v4 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-4667 v4 - Intel#io + |
base frequency | 2,200 MHz (2.2 GHz, 2,200,000 kHz) + |
bus links | 2 + |
bus rate | 9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) + |
bus speed | 4,800 MHz (4.8 GHz, 4,800,000 kHz) + |
bus type | QPI + |
chipset | C610 Series + |
clock multiplier | 22 + |
core count | 18 + |
core family | 6 + |
core model | 4F + |
core name | Broadwell EP + |
core stepping | B0 + |
core voltage | 1.82 V (18.2 dV, 182 cV, 1,820 mV) + |
cpuid | 406F1 + |
designer | Intel + |
die area | 456.12 mm² (0.707 in², 4.561 cm², 456,120,000 µm²) + |
family | Xeon E5 + |
first announced | June 20, 2016 + |
first launched | June 20, 2016 + |
full page name | intel/xeon e5/e5-4667 v4 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
io voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
io voltage tolerance | 3% + |
l1d$ description | 8-way set associative + |
l1d$ size | 576 KiB (589,824 B, 0.563 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 576 KiB (589,824 B, 0.563 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4.5 MiB (4,608 KiB, 4,718,592 B, 0.00439 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 45 MiB (46,080 KiB, 47,185,920 B, 0.0439 GiB) + |
ldate | June 20, 2016 + |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 360.15 K (87 °C, 188.6 °F, 648.27 °R) + |
max cpu count | 4 + |
max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
max pcie lanes | 40 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Broadwell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | E5-4667 v4 + |
name | Xeon E5-4667 v4 + |
part number | CM8066002064600 + |
platform | Grantley EP 4S + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 5,729.00 (€ 5,156.10, £ 4,640.49, ¥ 591,977.57) + |
s-spec | SR2SF + |
s-spec (qs) | QKSV + |
series | E5-4000 + |
smp max ways | 4 + |
tdp | 135 W (135,000 mW, 0.181 hp, 0.135 kW) + |
technology | CMOS + |
thread count | 36 + |
transistor count | 7,200,000,000 + |
turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |