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Difference between revisions of "amd/duron/dhm0850avs1b"
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{{amd title|Duron 850 (Camaro)}}
 
{{amd title|Duron 850 (Camaro)}}
−
{{mpu
+
{{chip
 
| name                = Duron 850
 
| name                = Duron 850
 
| no image            = Yes
 
| no image            = Yes
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| model number        = Duron 850
 
| model number        = Duron 850
 
| part number        = DHM0850AVS1B
 
| part number        = DHM0850AVS1B
−
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Mobile
 
| market              = Mobile
 
| first announced    = May 14, 2001
 
| first announced    = May 14, 2001
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 4 GB
+
| max memory          = 4 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              = 1.40 V
 
| v core              = 1.40 V
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}}
 
}}
 
The '''Mobile Duron 850''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of the second generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} on a [[180 nm process]], this MPU operated at 800 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.
 
The '''Mobile Duron 850''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of the second generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} on a [[180 nm process]], this MPU operated at 800 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.
 +
 +
== Cache ==
 +
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
 +
{{cache info
 +
|l1i cache=64 KiB
 +
|l1i break=1x64 KiB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=64 KiB
 +
|l1d break=1x64 KiB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=64 KiB
 +
|l2 break=1x64 KiB
 +
|l2 desc=16-way set associative
 +
|l2 extra=
 +
|l3 cache=
 +
|l3 break=
 +
|l3 desc=
 +
|l3 extra=
 +
}}
 +
 +
== Graphics ==
 +
This SoC has no integrated graphics processing unit.
 +
 +
== Features ==
 +
{{x86 features
 +
| em64t      =
 +
| nx          =
 +
| txt        =
 +
| tsx        =
 +
| vpro        =
 +
| ht          =
 +
| tbt1        =
 +
| tbt2        =
 +
| bpt        =
 +
| vt-x        =
 +
| vt-d        =
 +
| ept        =
 +
| mmx        = Yes
 +
| emmx        = Yes
 +
| 3dnow      = Yes
 +
| e3dnow      = Yes
 +
| sse        = Yes
 +
| sse2        =
 +
| sse3        =
 +
| ssse3      =
 +
| sse4        =
 +
| sse4.1      =
 +
| sse4.2      =
 +
| aes        =
 +
| pclmul      =
 +
| avx        =
 +
| avx2        =
 +
| bmi        =
 +
| bmi1        =
 +
| bmi2        =
 +
| f16c        =
 +
| fma3        =
 +
| mpx        =
 +
| sgx        =
 +
| eist        =
 +
}}
 +
* [[has feature::Halt State]]
 +
* [[has feature::Sleep State]]
 +
 +
== Documents ==
 +
=== DataSheet ===
 +
* [[:File:Mobile AMD Duron Processor Model 7 Data Sheet (December, 2001).pdf|Mobile AMD Duron Processor Model 7 Data Sheet]]; Publication # 24068; Rev: F; Issue Date: December 2001.
 +
 +
== See also ==
 +
* {{amd|Duron}}
 +
* {{intel|Celeron}}

Latest revision as of 15:07, 13 December 2017

Edit Values
Duron 850
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 850
Part NumberDHM0850AVS1B
MarketMobile
IntroductionMay 14, 2001 (announced)
May 14, 2001 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Mobile
LockedYes
Frequency850 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier8.5
CPUID670
Microarchitecture
MicroarchitectureK7
Core NameMorgan
Core Family6
Core Model7
Core Stepping0
Process180 nm
Transistors25,180,000
TechnologyCMOS
Die105.68 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.40 V ± 0.1 V
VI/O2.5 V ± 0.25 V
TDP25 W
Tcase0 °C – 95 °C
Tstorage-40 °C – 100 °C

The Mobile Duron 850 based on the Morgan (Camaro) core was a 32-bit x86 microprocessor developed by AMD and introduced in early 2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 on a 180 nm process, this MPU operated at 800 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.

Cache[edit]

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
SSEStreaming SIMD Extensions
  • Halt State
  • Sleep State

Documents[edit]

DataSheet[edit]

See also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/dhm0850avs1b&oldid=69969"
Facts about "Duron 850 (Camaro) - AMD"
RDF feed
base frequency850 MHz (0.85 GHz, 850,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier8.5 +
core count1 +
core family6 +
core model7 +
core nameMorgan +
core stepping0 +
core voltage1.4 V (14 dV, 140 cV, 1,400 mV) +
core voltage tolerance0.1 V +
cpuid670 +
designerAMD +
die area105.68 mm² (0.164 in², 1.057 cm², 105,680,000 µm²) +
familyDuron +
first announcedMay 14, 2001 +
first launchedMay 14, 2001 +
full page nameamd/duron/dhm0850avs1b +
has featureHalt State + and Sleep State +
has locked clock multipliertrue +
instance ofmicroprocessor +
io voltage2.5 V (25 dV, 250 cV, 2,500 mV) +
io voltage tolerance0.25 V +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateMay 14, 2001 +
manufacturerAMD +
market segmentMobile +
max case temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberDuron 850 +
nameDuron 850 +
part numberDHM0850AVS1B +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesDuron Mobile +
smp max ways1 +
tdp25 W (25,000 mW, 0.0335 hp, 0.025 kW) +
technologyCMOS +
thread count1 +
transistor count25,180,000 +
word size32 bit (4 octets, 8 nibbles) +