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Difference between revisions of "amd/duron/dhd1600dlv1c"
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{{amd title|Duron 1600 (Applebred)}} | {{amd title|Duron 1600 (Applebred)}} | ||
− | {{ | + | {{chip |
| name = Duron 1600 | | name = Duron 1600 | ||
− | | no image = | + | | no image = |
− | | image = | + | | image = KL AMD Duron Applebred.jpg |
− | | image size = | + | | image size = 250px |
| caption = | | caption = | ||
| designer = AMD | | designer = AMD | ||
Line 10: | Line 10: | ||
| model number = Duron 1600 | | model number = Duron 1600 | ||
| part number = DHD1600DLV1C | | part number = DHD1600DLV1C | ||
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = August 15, 2003 | | first announced = August 15, 2003 | ||
Line 37: | Line 37: | ||
| core stepping = 0 | | core stepping = 0 | ||
| core stepping 2 = 1 | | core stepping 2 = 1 | ||
− | | core stepping | + | | core stepping 3 = 2 |
| process = 130 nm | | process = 130 nm | ||
| transistors = 37,200,000 | | transistors = 37,200,000 | ||
Line 46: | Line 46: | ||
| thread count = 1 | | thread count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
+ | |||
− | |||
| power = | | power = | ||
| v core = 1.5 V | | v core = 1.5 V | ||
Line 80: | Line 80: | ||
| socket 0 type = PGA-462 | | socket 0 type = PGA-462 | ||
}} | }} | ||
+ | The '''Duron 1600''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This model was part of the third generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} and manufactured using their newer [[130 nm process]], this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}} | ||
+ | {{cache info | ||
+ | |l1i cache=64 KiB | ||
+ | |l1i break=1x64 KiB | ||
+ | |l1i desc=2-way set associative | ||
+ | |l1i extra= | ||
+ | |l1d cache=64 KiB | ||
+ | |l1d break=1x64 KiB | ||
+ | |l1d desc=2-way set associative | ||
+ | |l1d extra= | ||
+ | |l2 cache=64 KiB | ||
+ | |l2 break=1x64 KiB | ||
+ | |l2 desc=16-way set associative | ||
+ | |l2 extra= | ||
+ | |l3 cache= | ||
+ | |l3 break= | ||
+ | |l3 desc= | ||
+ | |l3 extra= | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This SoC has no integrated graphics processing unit. | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | | em64t = | ||
+ | | nx = | ||
+ | | txt = | ||
+ | | tsx = | ||
+ | | vpro = | ||
+ | | ht = | ||
+ | | tbt1 = | ||
+ | | tbt2 = | ||
+ | | bpt = | ||
+ | | vt-x = | ||
+ | | vt-d = | ||
+ | | ept = | ||
+ | | mmx = Yes | ||
+ | | emmx = Yes | ||
+ | | 3dnow = Yes | ||
+ | | e3dnow = Yes | ||
+ | | sse = Yes | ||
+ | | sse2 = | ||
+ | | sse3 = | ||
+ | | ssse3 = | ||
+ | | sse4 = | ||
+ | | sse4.1 = | ||
+ | | sse4.2 = | ||
+ | | aes = | ||
+ | | pclmul = | ||
+ | | avx = | ||
+ | | avx2 = | ||
+ | | bmi = | ||
+ | | bmi1 = | ||
+ | | bmi2 = | ||
+ | | f16c = | ||
+ | | fma3 = | ||
+ | | mpx = | ||
+ | | sgx = | ||
+ | | eist = | ||
+ | }} | ||
+ | * [[has feature::Halt State]] | ||
+ | * [[has feature::Sleep State]] | ||
+ | |||
+ | == Documents == | ||
+ | === DataSheet === | ||
+ | * [[:File:AMD Duron Processor Model 8 Data Sheet (August, 2003).pdf|AMD Duron Processor Model 8 Data Sheet]]; Publication # 25848; Rev: B; Issue Date: August 2003. | ||
+ | |||
+ | == Gallery == | ||
+ | <gallery> | ||
+ | File:Duron 1600 Applebred model A Front.jpg | ||
+ | </gallery> | ||
+ | |||
+ | == See also == | ||
+ | * {{amd|Duron}} | ||
+ | * {{intel|Celeron}} |
Latest revision as of 15:07, 13 December 2017
Edit Values | |
Duron 1600 | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | Duron 1600 |
Part Number | DHD1600DLV1C |
Market | Desktop |
Introduction | August 15, 2003 (announced) August 15, 2003 (launched) |
Shop | Amazon |
General Specs | |
Family | Duron |
Series | Duron Desktop |
Locked | Yes |
Frequency | 1600 MHz |
Bus type | FSB |
Bus speed | 133.33 MHz |
Bus rate | 266.66 MT/s |
Clock multiplier | 12 |
CPUID | 680 |
Microarchitecture | |
Microarchitecture | K7 |
Core Name | Applebred |
Core Family | 6 |
Core Model | 8 |
Core Stepping | 0, 1, 2 |
Process | 130 nm |
Transistors | 37,200,000 |
Technology | CMOS |
Die | 80.89 mm² |
Word Size | 32 bit |
Cores | 1 |
Threads | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 1.5 V ± 0.1 V |
TDP | 57 W |
Tcase | 0 °C – 85 °C |
Tstorage | -40 °C – 100 °C |
The Duron 1600 based on the Applebred core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2003. This model was part of the third generation of the Duron family. Designed based on AMD's K7 and manufactured using their newer 130 nm process, this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W.
Cache[edit]
- Main article: K7 § Cache
Cache Info [Edit Values] | ||
L1I$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
L1D$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
L2$ | 64 KiB 0.0625 MiB 65,536 B 6.103516e-5 GiB |
1x64 KiB 16-way set associative |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||
|
- Halt State
- Sleep State
Documents[edit]
DataSheet[edit]
- AMD Duron Processor Model 8 Data Sheet; Publication # 25848; Rev: B; Issue Date: August 2003.
Gallery[edit]
See also[edit]
Facts about "Duron 1600 (Applebred) - AMD"
base frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
bus rate | 266.66 MT/s (0.267 GT/s, 266,660 kT/s) + |
bus speed | 133.33 MHz (0.133 GHz, 133,330 kHz) + |
bus type | FSB + |
clock multiplier | 12 + |
core count | 1 + |
core family | 6 + |
core model | 8 + |
core name | Applebred + |
core stepping | 0 +, 1 + and 2 + |
core voltage | 1.5 V (15 dV, 150 cV, 1,500 mV) + |
core voltage tolerance | 0.1 V + |
cpuid | 680 + |
designer | AMD + |
die area | 80.89 mm² (0.125 in², 0.809 cm², 80,890,000 µm²) + |
family | Duron + |
first announced | August 15, 2003 + |
first launched | August 15, 2003 + |
full page name | amd/duron/dhd1600dlv1c + |
has feature | Halt State + and Sleep State + |
has locked clock multiplier | true + |
instance of | microprocessor + |
l1d$ description | 2-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) + |
ldate | August 15, 2003 + |
main image | + |
manufacturer | AMD + |
market segment | Desktop + |
max case temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max storage temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
microarchitecture | K7 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
model number | Duron 1600 + |
name | Duron 1600 + |
part number | DHD1600DLV1C + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |
series | Duron Desktop + |
smp max ways | 1 + |
tdp | 57 W (57,000 mW, 0.0764 hp, 0.057 kW) + |
technology | CMOS + |
thread count | 1 + |
transistor count | 37,200,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |