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Difference between revisions of "intel/core i5/i5-7500t"
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{{intel title|Core i5-7500T}}
 
{{intel title|Core i5-7500T}}
−
{{mpu
+
{{chip
−
| name               = Core i5-7500T
+
|name=Core i5-7500T
−
| no image           = yes
+
|no image=Yes
−
| image              =
+
|designer=Intel
−
| image size          =
+
|manufacturer=Intel
−
| caption            =  
+
|model number=i5-7500T
−
| designer           = Intel
+
|part number=CM8067702868115
−
| manufacturer       = Intel
+
|part number 2=BXC80677I57500T
−
| model number       = i5-7500T
+
|part number 3=BX80677I57500T
−
| part number         =  
+
|s-spec=SR337
−
| part number 1      =  
+
|market=Desktop
−
| part number 2      =  
+
|market 2=Embedded
−
| part number 3      =  
+
|first announced=January 3, 2017
−
| market             = Desktop
+
|first launched=January 3, 2017
−
| first announced     =  
+
|release price=$202.00
−
| first launched     =  
+
|family=Core i5
−
| last order          =  
+
|series=i5-7500
−
| last shipment      =
+
|locked=Yes
−
 
+
|frequency=2,700 MHz
−
| family             = Core i5
+
|turbo frequency1=3,300 MHz
−
| series             =  
+
|turbo frequency2=3,200 MHz
−
| locked             = Yes
+
|turbo frequency3=3,200 MHz
−
| frequency           = 2,700 MHz
+
|turbo frequency4=3,100 MHz
−
| turbo frequency    =
+
|bus type=DMI 3.0
−
| turbo frequency1   =  
+
|bus rate=8 GT/s
−
| turbo frequency2   =  
+
|clock multiplier=27
−
| turbo frequency3   =  
+
|isa=x86-64
−
| turbo frequency4   =
+
|isa family=x86
−
| turbo frequency5    =
+
|microarch=Kaby Lake
−
| turbo frequency6    =
+
|platform=Kaby Lake
−
| turbo frequency7    =
+
|chipset=Sunrise Point
−
| turbo frequency8    =  
+
|chipset 2=Union Point
−
| bus type           = DMI 3.0
+
|core name=Kaby Lake S
−
| bus speed          =
+
|core family=6
−
| bus rate           = 8 GT/s
+
|core model=158
−
| clock multiplier   = 27
+
|core stepping=B0
−
| s-spec              =  
+
|process=14 nm
−
| s-spec 2            =
+
|technology=CMOS
−
| s-spec N            =  
+
|word size=64 bit
−
| s-spec es          =  
+
|core count=4
−
| s-spec es 2        =
+
|thread count=4
−
| s-spec es N        =
+
|max cpus=1
−
| s-spec qs          =
+
|max memory=64 GiB
−
| s-spec qs 2        =
+
|v core min=0.55 V
−
| s-spec qs N        =
+
|v core max=1.52 V
−
| cpuid              =
+
|tdp=35 W
−
| cpuid 2            =
+
|ctdp down frequency=1,700 MHz
−
 
+
|tjunc min=0 °C
−
| microarch          = Kaby Lake
+
|tjunc max=80 °C
−
| platform            =  
+
|tstorage min=-25 °C
−
| chipset             =  
+
|tstorage max=125 °C
−
| core name           = Kaby Lake S
+
|package module 1={{packages/intel/lga-1151}}
−
| core family         =  
+
|turbo frequency=Yes
−
| core model         =
 
−
| core stepping      =
 
−
| core stepping 2    =  
 
−
| core stepping N    =  
 
−
| process             = 14 nm
 
−
| transistors        =
 
−
| technology         = CMOS
 
−
| die area            =
 
−
| die width          =
 
−
| die length          =
 
−
| word size           = 32 bit
 
−
| core count         = 4
 
−
| thread count       = 4
 
−
| max cpus           = 1
 
−
| max memory         = 64 GB
 
−
| max memory addr    =
 
−
 
 
−
| electrical          = Yes
 
−
| power              =
 
−
| v core             =  
 
−
| v core tolerance    =
 
−
| v io                =
 
−
| v io tolerance      =
 
−
| sdp                =  
 
−
| tdp                 = 35 W
 
−
| temp min            =
 
−
| temp max            =
 
−
| tjunc min          =  
 
−
| tjunc max          =
 
−
| tcase min           = 0 °C
 
−
| tcase max           = 66 °C
 
−
| tstorage min       =  
 
−
| tstorage max       =  
 
−
 
 
−
| packaging          = Yes
 
−
| package             = FCLGA-1151
 
−
| package type        = FCLGA
 
−
| package pitch      = 0.914 mm
 
−
| package size        = 37.5 mm x 37.5 mm
 
−
| socket              = LGA-1151
 
−
| socket type        = LGA
 
 
}}
 
}}
−
The '''Core i5-7500T''' is a {{arch|64}} [[x86]] [[quad-core microprocessor]] based on {{intel|Kaby Lake|l=arch}} and is set to be introduced by [[Intel]] in late 2016. This MPU operates at 2.7 GHz with a TDP rating of 35 W.
+
'''Core i5-7500T''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] microprocessor introduced by [[Intel]] in early [[2017]] for the desktop and embedded markets. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7500T operates at 2.7 GHz with a TDP of 35 W supporting a {{intel|Turbo Boost}} frequency of 3.3 GHz. The processor supports up to 64 GiB of dual-channel non-ECC DDR4-2400 memory and incorporates Intel's {{intel|HD Graphics 630}} [[IGP]] operating at 350 MHz with a burst frequency of 1 GHz.
  
−
 
+
This model has a configurable TDP-down frequency of 1.7 GHz.
−
{{unknown features}}
 
  
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/kaby lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
+
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
−
{{cache info
+
{{cache size
 +
|l1 cache=256 KiB
 
|l1i cache=128 KiB
 
|l1i cache=128 KiB
 
|l1i break=4x32 KiB
 
|l1i break=4x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i extra=(per core, write-back)
 
 
|l1d cache=128 KiB
 
|l1d cache=128 KiB
 
|l1d break=4x32 KiB
 
|l1d break=4x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
 
|l2 cache=1 MiB
 
|l2 cache=1 MiB
 
|l2 break=4x256 KiB
 
|l2 break=4x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
−
|l2 extra=(per core, write-back)
+
|l2 policy=write-back
 
|l3 cache=6 MiB
 
|l3 cache=6 MiB
−
|l3 desc=shared
+
|l3 break=4x1.5 MiB
 +
|l3 desc=12-way set associative
 +
|l3 policy=write-back
 +
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3L-1600
 +
|type 2=DDR4-2400
 +
|ecc=No
 +
|max mem=64 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=35.76 GiB/s
 +
|bandwidth schan=17.88 GiB/s
 +
|bandwidth dchan=35.76 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 16
 +
| pcie config        = 1x16
 +
| pcie config 2      = 2x8
 +
| pcie config 3      = 1x8+2x4
 
}}
 
}}
  
 
== Graphics ==
 
== Graphics ==
−
{{integrated graphic
+
{{integrated graphics
−
| gpu                = Intel HD Graphics 630
+
| gpu                = HD Graphics 630
−
| device id          =  
+
| device id          = 0x5912
 +
| designer            = Intel
 
| execution units    = 24
 
| execution units    = 24
−
| displays           = 3
+
| max displays       = 3
−
| frequency          = ? MHz
+
| max memory          = 64 GiB
−
| max frequency      = ? GHz
+
| frequency          = 350 MHz
−
| max memory          = 64 GB
+
| max frequency      = 1,100 MHz
  
 
| output crt          =  
 
| output crt          =  
Line 138: Line 121:
 
| output dvi          = Yes
 
| output dvi          = Yes
  
−
| directx ver         = 12.1
+
| directx ver       = 12
−
| opengl ver         = 4.4
+
| opengl ver         = 4.4
−
| opencl ver         = 2.0
+
| opencl ver         = 2.0
−
| opengl es ver       =  
+
| hdmi ver          = 1.4a
−
| hdmi ver            = 1.4
+
| dp ver             = 1.2
−
| dvi ver            =  
+
| edp ver            = 1.4
−
| dsi ver            =  
+
| max res hdmi      = 4096x2304
−
| vulkan ver          =  
+
| max res hdmi freq  = 24 Hz
−
| dp ver              = 1.2
+
| max res dp        = 4096x2304
−
| edp ver             = 1.3
+
| max res dp freq    = 60 Hz
 +
| max res edp        = 4096x2304
 +
| max res edp freq  = 60 Hz
 +
| max res vga        =
 +
| max res vga freq  =
 +
 
 +
| features             = Yes
 +
| intel quick sync    = Yes
 +
| intel intru 3d      = Yes
 +
| intel insider        =
 +
| intel widi          =
 +
| intel fdi            =
 +
| intel clear video    = Yes
 +
| intel clear video hd = Yes
 +
}}
 +
{{kaby lake hardware accelerated video table|col=1}}
  
−
| max res hdmi        = 4096x2304
+
== Features ==
−
| max res hdmi freq  = 24 Hz
+
{{x86 features
−
| max res dvi        =  
+
|real=Yes
−
| max res dvi freq    =  
+
|protected=Yes
−
| max res dsi        =  
+
|smm=Yes
−
| max res dsi freq    =  
+
|fpu=Yes
−
| max res dp          = 4096x2304
+
|x8616=Yes
−
| max res dp freq    = 60 Hz
+
|x8632=Yes
−
| max res edp        = 4096x2304
+
|x8664=Yes
−
| max res edp freq    = 60 Hz
+
|nx=Yes
−
| max res vga        =  
+
|3dnow=No
−
| max res vga freq    =
+
|e3dnow=No
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
  
−
| intel quick sync  = Yes
+
|abm=Yes
−
| intel intru 3d    = Yes
+
|tbm=No
−
| intel insider      = Yes
+
|bmi1=Yes
−
| intel widi        = Yes
+
|bmi2=Yes
−
| intel fdi          =  
+
|fma3=Yes
−
| intel clear video  = Yes
+
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=No
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=Yes
 +
|att=No
 +
|ipt=Yes
 +
|tsx=Yes
 +
|txt=Yes
 +
|ht=No
 +
|vpro=Yes
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=No
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|smartmp=No
 +
|powernow=No
 +
|amdv=No
 +
|rvi=No
 
}}
 
}}
 +
 +
== Die Shot ==
 +
{{see also|intel/microarchitectures/kaby_lake#Die|l1=Kaby Lake § Die Shot}}
 +
A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
 +
 +
: [[File:kaby lake (quad core).png|650px]]
 +
 +
 +
: [[File:kaby lake (quad core) (annotated).png|650px]]

Latest revision as of 16:20, 13 December 2017

Edit Values
Core i5-7500T
General Info
DesignerIntel
ManufacturerIntel
Model Numberi5-7500T
Part NumberCM8067702868115,
BXC80677I57500T,
BX80677I57500T
S-SpecSR337
MarketDesktop, Embedded
IntroductionJanuary 3, 2017 (announced)
January 3, 2017 (launched)
Release Price$202.00
ShopAmazon
General Specs
FamilyCore i5
Seriesi5-7500
LockedYes
Frequency2,700 MHz
Turbo FrequencyYes
Turbo Frequency3,300 MHz (1 core),
3,200 MHz (2 cores),
3,200 MHz (3 cores),
3,100 MHz (4 cores)
Bus typeDMI 3.0
Bus rate8 GT/s
Clock multiplier27
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureKaby Lake
PlatformKaby Lake
ChipsetSunrise Point, Union Point
Core NameKaby Lake S
Core Family6
Core Model158
Core SteppingB0
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores4
Threads4
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP35 W
cTDP down frequency1,700 MHz
Tjunction0 °C – 80 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCLGA-1151 (LGA)
FC-LGA14C		FCLGA-1151.svg
Dimension37.5 mm x 37.5 mm x 4.4 mm
Pitch0.914 mm
Contacts1151
SocketLGA-1151

Core i5-7500T is a 64-bit quad-core mid-range performance x86 microprocessor introduced by Intel in early 2017 for the desktop and embedded markets. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7500T operates at 2.7 GHz with a TDP of 35 W supporting a Turbo Boost frequency of 3.3 GHz. The processor supports up to 64 GiB of dual-channel non-ECC DDR4-2400 memory and incorporates Intel's HD Graphics 630 IGP operating at 350 MHz with a burst frequency of 1 GHz.

This model has a configurable TDP-down frequency of 1.7 GHz.

Cache[edit]

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$6 MiB
6,144 KiB
6,291,456 B
0.00586 GiB
  4x1.5 MiB12-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2400
Supports ECCNo
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics 630
DesignerIntelDevice ID0x5912
Execution Units24Max Displays3
Max Memory64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency1,100 MHz
1.1 GHz
1,100,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.4
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
SIPPStable Image Platform Program
IPTIdentity Protection Technology

Die Shot[edit]

See also: Kaby Lake § Die Shot

A die shot of Intel's Kaby Lake Quad Core desktop processors:

kaby lake (quad core).png


kaby lake (quad core) (annotated).png
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-7500t&oldid=70669"
Facts about "Core i5-7500T - Intel"
RDF feed
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ descriptionshared +
l3$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +