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Difference between revisions of "intel/core i5/i5-7500"
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{{intel title|Core i5-7500}} | {{intel title|Core i5-7500}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Core i5-7500 |
− | | no image | + | |no image=Yes |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | + | |model number=i5-7500 | |
− | | designer | + | |part number=CM8067702868012 |
− | | manufacturer | + | |part number 2=BXC80677I57500 |
− | | model number | + | |part number 3=BX80677I57500 |
− | | part number | + | |s-spec=SR335 |
− | | part number | + | |market=Desktop |
− | | part number | + | |market 2=Embedded |
− | | | + | |first announced=January 3, 2017 |
− | | market | + | |first launched=January 3, 2017 |
− | | first announced | + | |release price=$202.00 |
− | | first launched | + | |family=Core i5 |
− | | | + | |series=i5-7500 |
− | + | |locked=Yes | |
− | + | |frequency=3,400 MHz | |
− | | family | + | |turbo frequency1=3,800 MHz |
− | | series | + | |turbo frequency2=3,700 MHz |
− | | locked | + | |turbo frequency3=3,700 MHz |
− | | frequency | + | |turbo frequency4=3,600 MHz |
− | + | |bus type=DMI 3.0 | |
− | | turbo frequency1 | + | |bus rate=8 GT/s |
− | | turbo frequency2 | + | |clock multiplier=34 |
− | | turbo frequency3 | + | |isa=x86-64 |
− | | turbo frequency4 | + | |isa family=x86 |
− | + | |microarch=Kaby Lake | |
− | + | |platform=Kaby Lake | |
− | + | |chipset=Sunrise Point | |
− | + | |chipset 2=Union Point | |
− | | bus type | + | |core name=Kaby Lake S |
− | + | |core family=6 | |
− | | bus rate | + | |core model=158 |
− | | clock multiplier | + | |core stepping=B0 |
− | | | + | |process=14 nm |
− | + | |technology=CMOS | |
− | | | + | |word size=64 bit |
− | | | + | |core count=4 |
− | | | + | |thread count=4 |
− | + | |max cpus=1 | |
− | + | |max memory=64 GiB | |
− | + | |v core min=0.55 V | |
− | + | |v core max=1.52 V | |
− | + | |tdp=65 W | |
− | + | |tjunc min=0 °C | |
− | + | |tjunc max=100 °C | |
− | + | |tstorage min=-25 °C | |
− | | | + | |tstorage max=125 °C |
− | | chipset | + | |package module 1={{packages/intel/lga-1151}} |
− | | core name | + | |turbo frequency=Yes |
− | | core family | ||
− | | core model | ||
− | |||
− | |||
− | | core stepping | ||
− | | process | ||
− | |||
− | | technology | ||
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− | |||
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− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
− | |||
− | |||
− | |||
− | |||
− | | v core | ||
− | | v core | ||
− | |||
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− | |||
− | | tdp | ||
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− | | tjunc | ||
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− | | tstorage min | ||
− | | tstorage max | ||
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− | |||
− | | package | ||
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}} | }} | ||
− | + | '''Core i5-7500''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] microprocessor introduced by [[Intel]] in early [[2017]] for the desktop and embedded markets. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7500 operates at 3.4 GHz with a TDP of 65 W supporting a {{intel|Turbo Boost}} frequency of 3.8 GHz. The processor supports up to 64 GiB of dual-channel non-ECC DDR4-2400 memory and incorporates Intel's {{intel|HD Graphics 630}} [[IGP]] operating at 350 MHz with a burst frequency of 1.1 GHz. | |
− | |||
− | |||
− | {{ | ||
== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/ | + | {{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} |
− | {{cache | + | {{cache size |
+ | |l1 cache=256 KiB | ||
|l1i cache=128 KiB | |l1i cache=128 KiB | ||
|l1i break=4x32 KiB | |l1i break=4x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |||
|l1d cache=128 KiB | |l1d cache=128 KiB | ||
|l1d break=4x32 KiB | |l1d break=4x32 KiB | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
− | |l1d | + | |l1d policy=write-back |
|l2 cache=1 MiB | |l2 cache=1 MiB | ||
|l2 break=4x256 KiB | |l2 break=4x256 KiB | ||
|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
− | |l2 | + | |l2 policy=write-back |
|l3 cache=6 MiB | |l3 cache=6 MiB | ||
− | |l3 desc= | + | |l3 break=4x1.5 MiB |
+ | |l3 desc=12-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR3L-1600 | ||
+ | |type 2=DDR4-2400 | ||
+ | |ecc=No | ||
+ | |max mem=64 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=35.76 GiB/s | ||
+ | |bandwidth schan=17.88 GiB/s | ||
+ | |bandwidth dchan=35.76 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 16 | ||
+ | | pcie config = 1x16 | ||
+ | | pcie config 2 = 2x8 | ||
+ | | pcie config 3 = 1x8+2x4 | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | {{integrated graphics | ||
+ | | gpu = HD Graphics 630 | ||
+ | | device id = 0x5912 | ||
+ | | designer = Intel | ||
+ | | execution units = 24 | ||
+ | | max displays = 3 | ||
+ | | max memory = 64 GiB | ||
+ | | frequency = 350 MHz | ||
+ | | max frequency = 1,100 MHz | ||
+ | |||
+ | | output crt = | ||
+ | | output sdvo = | ||
+ | | output dsi = | ||
+ | | output edp = Yes | ||
+ | | output dp = Yes | ||
+ | | output hdmi = Yes | ||
+ | | output vga = | ||
+ | | output dvi = Yes | ||
+ | |||
+ | | directx ver = 12 | ||
+ | | opengl ver = 4.4 | ||
+ | | opencl ver = 2.0 | ||
+ | | hdmi ver = 1.4a | ||
+ | | dp ver = 1.2 | ||
+ | | edp ver = 1.4 | ||
+ | | max res hdmi = 4096x2304 | ||
+ | | max res hdmi freq = 24 Hz | ||
+ | | max res dp = 4096x2304 | ||
+ | | max res dp freq = 60 Hz | ||
+ | | max res edp = 4096x2304 | ||
+ | | max res edp freq = 60 Hz | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
+ | |||
+ | | features = Yes | ||
+ | | intel quick sync = Yes | ||
+ | | intel intru 3d = Yes | ||
+ | | intel insider = | ||
+ | | intel widi = | ||
+ | | intel fdi = | ||
+ | | intel clear video = Yes | ||
+ | | intel clear video hd = Yes | ||
+ | }} | ||
+ | {{kaby lake hardware accelerated video table|col=1}} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=Yes | ||
+ | |att=No | ||
+ | |ipt=Yes | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=No | ||
+ | |vpro=Yes | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=No | ||
+ | |mpx=Yes | ||
+ | |sgx=Yes | ||
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdv=No | ||
+ | |rvi=No | ||
}} | }} | ||
+ | |||
+ | == Die Shot == | ||
+ | {{see also|intel/microarchitectures/kaby_lake#Die|l1=Kaby Lake § Die Shot}} | ||
+ | A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors: | ||
+ | |||
+ | : [[File:kaby lake (quad core).png|650px]] | ||
+ | |||
+ | |||
+ | : [[File:kaby lake (quad core) (annotated).png|650px]] |
Latest revision as of 20:59, 13 September 2018
Edit Values | ||||||||||||
Core i5-7500 | ||||||||||||
General Info | ||||||||||||
Designer | Intel | |||||||||||
Manufacturer | Intel | |||||||||||
Model Number | i5-7500 | |||||||||||
Part Number | CM8067702868012, BXC80677I57500, BX80677I57500 | |||||||||||
S-Spec | SR335 | |||||||||||
Market | Desktop, Embedded | |||||||||||
Introduction | January 3, 2017 (announced) January 3, 2017 (launched) | |||||||||||
Release Price | $202.00 | |||||||||||
Shop | Amazon | |||||||||||
General Specs | ||||||||||||
Family | Core i5 | |||||||||||
Series | i5-7500 | |||||||||||
Locked | Yes | |||||||||||
Frequency | 3,400 MHz | |||||||||||
Turbo Frequency | Yes | |||||||||||
Turbo Frequency | 3,800 MHz (1 core), 3,700 MHz (2 cores), 3,700 MHz (3 cores), 3,600 MHz (4 cores) | |||||||||||
Bus type | DMI 3.0 | |||||||||||
Bus rate | 8 GT/s | |||||||||||
Clock multiplier | 34 | |||||||||||
Microarchitecture | ||||||||||||
ISA | x86-64 (x86) | |||||||||||
Microarchitecture | Kaby Lake | |||||||||||
Platform | Kaby Lake | |||||||||||
Chipset | Sunrise Point, Union Point | |||||||||||
Core Name | Kaby Lake S | |||||||||||
Core Family | 6 | |||||||||||
Core Model | 158 | |||||||||||
Core Stepping | B0 | |||||||||||
Process | 14 nm | |||||||||||
Technology | CMOS | |||||||||||
Word Size | 64 bit | |||||||||||
Cores | 4 | |||||||||||
Threads | 4 | |||||||||||
Max Memory | 64 GiB | |||||||||||
Multiprocessing | ||||||||||||
Max SMP | 1-Way (Uniprocessor) | |||||||||||
Electrical | ||||||||||||
Vcore | 0.55 V-1.52 V | |||||||||||
TDP | 65 W | |||||||||||
Tjunction | 0 °C – 100 °C | |||||||||||
Tstorage | -25 °C – 125 °C | |||||||||||
Packaging | ||||||||||||
|
Core i5-7500 is a 64-bit quad-core mid-range performance x86 microprocessor introduced by Intel in early 2017 for the desktop and embedded markets. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7500 operates at 3.4 GHz with a TDP of 65 W supporting a Turbo Boost frequency of 3.8 GHz. The processor supports up to 64 GiB of dual-channel non-ECC DDR4-2400 memory and incorporates Intel's HD Graphics 630 IGP operating at 350 MHz with a burst frequency of 1.1 GHz.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Die Shot[edit]
- See also: Kaby Lake § Die Shot
A die shot of Intel's Kaby Lake Quad Core desktop processors:
Facts about "Core i5-7500 - Intel"
has feature | integrated gpu + |
integrated gpu | Intel HD Graphics 630 + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | shared + |
l3$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |