From WikiChip
Difference between revisions of "amd/k6-iii+/amd-k6-iii+-500acz"
< amd‎ | k6-iii+

m (Bot: moving all {{mpu}} to {{chip}})
 
(9 intermediate revisions by 3 users not shown)
Line 1: Line 1:
 
{{amd title|AMD-K6-III+/500ACZ}}
 
{{amd title|AMD-K6-III+/500ACZ}}
−
{{mpu
+
{{chip
 
| name                = AMD-K6-III+/500ACZ
 
| name                = AMD-K6-III+/500ACZ
 
| no image            = Yes
 
| no image            = Yes
Line 10: Line 10:
 
| model number        = AMD-K6-III+/500ACZ
 
| model number        = AMD-K6-III+/500ACZ
 
| part number        = AMD-K6-III+/500ACZ
 
| part number        = AMD-K6-III+/500ACZ
−
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Mobile
 
| market              = Mobile
−
| first announced    = April 18, 1999
+
| first announced    = April 18, 2000
−
| first launched      = April 18, 1999
+
| first launched      = April 18, 2000
 
| last order          =  
 
| last order          =  
 
| last shipment      =  
 
| last shipment      =  
Line 40: Line 40:
 
| core stepping 4    = 3
 
| core stepping 4    = 3
 
| process            = 0.18 µm
 
| process            = 0.18 µm
−
| transistors        = 21,300,000
+
| transistors        = 21,400,000
 
| technology          = CMOS
 
| technology          = CMOS
 
| die area            = <!-- XX mm² -->
 
| die area            = <!-- XX mm² -->
Line 49: Line 49:
 
| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 4 GB
+
| max memory          = 4 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              = 16 W
 
| power              = 16 W
 
| v core              = 2.0 V
 
| v core              = 2.0 V
Line 81: Line 81:
 
| socket 0 2 type    = PGA-321
 
| socket 0 2 type    = PGA-321
 
}}
 
}}
−
'''AMD-K6-III+/500ACZ''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was manufactured on a [[0.18 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5 with a maximum power dissipation rating of 16 W.
+
'''AMD-K6-III+/500ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000]]. This MPU which was manufactured on a [[0.18 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5 with a maximum power dissipation rating of 16 W and a typical rating of 12.6 W.
  
 
== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/k6-iii#Memory_Hierarchy|l1=K6-III § Cache}}
 
{{main|amd/microarchitectures/k6-iii#Memory_Hierarchy|l1=K6-III § Cache}}
−
[[L3$]] can be 512 KB to 2 MB, depending on manufacturer and [[motherboard]] model. L3$ is off-chip.
+
[[L3$]] can be 512 KiB to 2 MiB, depending on manufacturer and [[motherboard]] model. L3$ is off-chip.
 
{{cache info
 
{{cache info
−
|l1i cache=32 KB
+
|l1i cache=32 KiB
−
|l1i break=1x32 KB
+
|l1i break=1x32 KiB
 
|l1i desc=2-way set associative
 
|l1i desc=2-way set associative
 
|l1i extra=
 
|l1i extra=
−
|l1d cache=32 KB
+
|l1d cache=32 KiB
−
|l1d break=1x32 KB
+
|l1d break=1x32 KiB
 
|l1d desc=2-way set associative
 
|l1d desc=2-way set associative
 
|l1d extra=
 
|l1d extra=
−
|l2 cache=256 KB
+
|l2 cache=256 KiB
−
|l2 break=1x256
+
|l2 break=1x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
 
|l2 extra=(shared)
 
|l2 extra=(shared)
Line 106: Line 106:
  
 
== Graphics ==
 
== Graphics ==
−
This SoC has no integrated graphics processing unit.
+
This processors has no integrated graphics processing unit.
  
 
== Features ==
 
== Features ==
−
{{mpu features
+
{{x86 features
 
| mmx        = Yes
 
| mmx        = Yes
 
| emmx        = Yes
 
| emmx        = Yes

Latest revision as of 15:09, 13 December 2017

Edit Values
AMD-K6-III+/500ACZ
General Info
DesignerAMD
ManufacturerAMD
Model NumberAMD-K6-III+/500ACZ
Part NumberAMD-K6-III+/500ACZ
MarketMobile
IntroductionApril 18, 2000 (announced)
April 18, 2000 (launched)
ShopAmazon
General Specs
FamilyK6-III+
SeriesK6-III+ Mobile
Frequency499.99 MHz
Bus typeFSB
Bus speed99.99 MHz
Bus rate99.99 MT/s
Clock multiplier5
CPUID5D0
Microarchitecture
MicroarchitectureK6-III
PlatformSuper 7
Core Family5
Core Model13
Core Stepping0, 1, 2, 3
Process0.18 µm
Transistors21,400,000
TechnologyCMOS
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation16 W
Vcore2.0 V ± 0.1 V
VI/O3.3675 V ± 7%
Tcase0 °C – 85 °C
Tstorage-65 °C – 150 °C

AMD-K6-III+/500ACZ is a 32-bit x86 mobile microprocessor designed by AMD and introduced in early 2000. This MPU which was manufactured on a 0.18 µm process, based on K6-III microarchitecture, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5 with a maximum power dissipation rating of 16 W and a typical rating of 12.6 W.

Cache[edit]

Main article: K6-III § Cache

L3$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L3$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L2$ 256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
1x256 KiB 4-way set associative (shared)

Graphics[edit]

This processors has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
  • Auto-power down state
  • Stop clock state
  • Halt state
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6-iii%2B/amd-k6-iii%2B-500acz&oldid=70082"
Facts about "AMD-K6-III+/500ACZ - AMD"
RDF feed
base frequency499.99 MHz (0.5 GHz, 499,990 kHz) +
bus rate99.99 MT/s (0.1 GT/s, 99,990 kT/s) +
bus speed99.99 MHz (0.1 GHz, 99,990 kHz) +
bus typeFSB +
clock multiplier5 +
core count1 +
core family5 +
core model13 +
core stepping0 +, 1 +, 2 + and 3 +
core voltage2 V (20 dV, 200 cV, 2,000 mV) +
core voltage tolerance0.1 V +
cpuid5D0 +
designerAMD +
familyK6-III+ +
first announcedApril 18, 2000 +
first launchedApril 18, 2000 +
full page nameamd/k6-iii+/amd-k6-iii+-500acz +
instance ofmicroprocessor +
io voltage3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) +
io voltage tolerance7% +
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description4-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateApril 18, 2000 +
manufacturerAMD +
market segmentMobile +
max case temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature423.15 K (150 °C, 302 °F, 761.67 °R) +
microarchitectureK6-III +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature208.15 K (-65 °C, -85 °F, 374.67 °R) +
model numberAMD-K6-III+/500ACZ +
nameAMD-K6-III+/500ACZ +
part numberAMD-K6-III+/500ACZ +
platformSuper 7 +
power dissipation16 W (16,000 mW, 0.0215 hp, 0.016 kW) +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesK6-III+ Mobile +
smp max ways1 +
technologyCMOS +
thread count1 +
transistor count21,400,000 +
word size32 bit (4 octets, 8 nibbles) +