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Difference between revisions of "amd/duron/dm600avs1b"
< amd‎ | duron

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{{amd title|Duron 600 (Spitfire Mobile)}}
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{{amd title|Mobile Duron 600 (Spitfire)}}
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{{mpu
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{{chip
 
| name                = Duron 600
 
| name                = Duron 600
 
| no image            = Yes
 
| no image            = Yes
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| model number        = Duron 600
 
| model number        = Duron 600
 
| part number        = DM600AVS1B
 
| part number        = DM600AVS1B
−
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Mobile
 
| market              = Mobile
 
| first announced    = January 15, 2001
 
| first announced    = January 15, 2001
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| family              = Duron
 
| family              = Duron
−
| series              = Duron Desktop
+
| series              = Duron Mobile
 
| locked              = Yes
 
| locked              = Yes
 
| frequency          = 600 MHz
 
| frequency          = 600 MHz
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 4 GB
+
| max memory          = 4 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              = 1.4 V
 
| v core              = 1.4 V
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| socket 0 type      = PGA-462
 
| socket 0 type      = PGA-462
 
}}
 
}}
 +
'''Mobile Duron 600''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} mobile [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of the first series of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 600 MHz with a bus capable of 200 MT/s.
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== Cache ==
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{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
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{{cache info
 +
|l1i cache=64 KiB
 +
|l1i break=1x64 KiB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=64 KiB
 +
|l1d break=1x64 KiB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=64 KiB
 +
|l2 break=1x64 KiB
 +
|l2 desc=16-way set associative
 +
|l2 extra=
 +
|l3 cache=
 +
|l3 break=
 +
|l3 desc=
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|l3 extra=
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}}
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== Graphics ==
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This SoC has no integrated graphics processing unit.
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== Features ==
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{{x86 features
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| em64t      =
 +
| nx          =
 +
| txt        =
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| tsx        =
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| vpro        =
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| ht          =
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| tbt1        =
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| tbt2        =
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| bpt        =
 +
| vt-x        =
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| vt-d        =
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| ept        =
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| mmx        = Yes
 +
| emmx        = Yes
 +
| 3dnow      = Yes
 +
| e3dnow      = Yes
 +
| sse        =
 +
| sse2        =
 +
| sse3        =
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| ssse3      =
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| sse4        =
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| sse4.1      =
 +
| sse4.2      =
 +
| aes        =
 +
| pclmul      =
 +
| avx        =
 +
| avx2        =
 +
| bmi        =
 +
| bmi1        =
 +
| bmi2        =
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| f16c        =
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| fma3        =
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| mpx        =
 +
| sgx        =
 +
| eist        =
 +
}}
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* [[has feature::Halt State]]
 +
* [[has feature::Sleep State]]

Latest revision as of 15:07, 13 December 2017

Edit Values
Duron 600
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 600
Part NumberDM600AVS1B
MarketMobile
IntroductionJanuary 15, 2001 (announced)
January 15, 2001 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Mobile
LockedYes
Frequency600 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier6
CPUID630
Microarchitecture
MicroarchitectureK7
Core NameSpitfire
Core Family6
Core Model3
Core Stepping0
Process180 nm
Transistors25,000,000
TechnologyCMOS
Die100 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.4 V ± 0.1 V
Tcase0 °C – 95 °C
Tstorage-40 °C – 100 °C

Mobile Duron 600 based on the Spitfire core was a 32-bit mobile x86 microprocessor developed by AMD and introduced in early 2001. This model was part of the first series of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 600 MHz with a bus capable of 200 MT/s.

Cache[edit]

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
  • Halt State
  • Sleep State
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/dm600avs1b&oldid=69977"
Facts about "Mobile Duron 600 (Spitfire) - AMD"
RDF feed
base frequency600 MHz (0.6 GHz, 600,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier6 +
core count1 +
core family6 +
core model3 +
core nameSpitfire +
core stepping0 +
core voltage1.4 V (14 dV, 140 cV, 1,400 mV) +
core voltage tolerance0.1 V +
cpuid630 +
designerAMD +
die area100 mm² (0.155 in², 1 cm², 100,000,000 µm²) +
familyDuron +
first announcedJanuary 15, 2001 +
first launchedJanuary 15, 2001 +
full page nameamd/duron/dm600avs1b +
has featureHalt State + and Sleep State +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateJanuary 15, 2001 +
manufacturerAMD +
market segmentMobile +
max case temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberDuron 600 +
nameDuron 600 +
part numberDM600AVS1B +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesDuron Mobile +
smp max ways1 +
technologyCMOS +
thread count1 +
transistor count25,000,000 +
word size32 bit (4 octets, 8 nibbles) +