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Difference between revisions of "amd/duron/d650aut1b"
< amd‎ | duron

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{{amd title|Duron 650 (Spitfire)}}
 
{{amd title|Duron 650 (Spitfire)}}
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{{mpu
+
{{chip
 
| name                = Duron 650
 
| name                = Duron 650
 
| no image            = Yes
 
| no image            = Yes
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| model number        = Duron 650
 
| model number        = Duron 650
 
| part number        = D650AUT1B
 
| part number        = D650AUT1B
−
| part number 1       = D0650AUT1B
+
| part number 2       = D0650AUT1B
−
| part number 2      =
 
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Desktop
 
| market              = Desktop
 
| first announced    = June 5, 2000
 
| first announced    = June 5, 2000
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| family              = Duron
 
| family              = Duron
 
| series              = Duron Desktop
 
| series              = Duron Desktop
−
| locked              = 650
+
| locked              = Yes
 
| frequency          = 550 MHz
 
| frequency          = 550 MHz
 
| bus type            = FSB
 
| bus type            = FSB
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 4 GB
+
| max memory          = 4 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              = 1.6 V
 
| v core              = 1.6 V
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| socket 0 type      = PGA-462
 
| socket 0 type      = PGA-462
 
}}
 
}}
−
'''Duron 650''' based on the Spitfire core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the first series of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 650 MHz with a bus capable of 200 MT/s with a typical TDP of 29.4 W.
+
'''Duron 650''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the first series of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 650 MHz with a bus capable of 200 MT/s with a typical TDP of 29.4 W.
 +
 
 +
== Cache ==
 +
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
 +
{{cache info
 +
|l1i cache=64 KiB
 +
|l1i break=1x64 KiB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=64 KiB
 +
|l1d break=1x64 KiB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=64 KiB
 +
|l2 break=1x64 KiB
 +
|l2 desc=16-way set associative
 +
|l2 extra=
 +
|l3 cache=
 +
|l3 break=
 +
|l3 desc=
 +
|l3 extra=
 +
}}
 +
 
 +
== Graphics ==
 +
This SoC has no integrated graphics processing unit.
 +
 
 +
== Features ==
 +
{{x86 features
 +
| em64t      =
 +
| nx          =
 +
| txt        =
 +
| tsx        =
 +
| vpro        =
 +
| ht          =
 +
| tbt1        =
 +
| tbt2        =
 +
| bpt        =
 +
| vt-x        =
 +
| vt-d        =
 +
| ept        =
 +
| mmx        = Yes
 +
| emmx        = Yes
 +
| 3dnow      = Yes
 +
| e3dnow      = Yes
 +
| sse        =
 +
| sse2        =
 +
| sse3        =
 +
| ssse3      =
 +
| sse4        =
 +
| sse4.1      =
 +
| sse4.2      =
 +
| aes        =
 +
| pclmul      =
 +
| avx        =
 +
| avx2        =
 +
| bmi        =
 +
| bmi1        =
 +
| bmi2        =
 +
| f16c        =
 +
| fma3        =
 +
| mpx        =
 +
| sgx        =
 +
| eist        =
 +
}}
 +
* [[has feature::Halt State]]
 +
* [[has feature::Sleep State]]
 +
 
 +
== Documents ==
 +
=== DataSheet ===
 +
* [[:File:AMD Duron Processor Model 3 Data Sheet (June, 2001).pdf|AMD Duron Processor Model 3 Data Sheet]]; Publication # 23802; Rev: I; Issue Date: June 2001.
 +
=== Other ===
 +
* [[:File:AMD Duron Processor Model 3 Revision Guide (October, 2003).pdf|AMD Duron Processor Model 3 Revision Guide]]; Publication # 23865; Rev: K; Issue Date: October 2003.

Latest revision as of 15:07, 13 December 2017

Edit Values
Duron 650
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 650
Part NumberD650AUT1B,
D0650AUT1B
MarketDesktop
IntroductionJune 5, 2000 (announced)
June 19, 2000 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Desktop
LockedYes
Frequency550 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier6.5
CPUID630
Microarchitecture
MicroarchitectureK7
Core NameSpitfire
Core Family6
Core Model3
Core Stepping0
Process180 nm
Transistors25,000,000
TechnologyCMOS
Die100 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.6 V ± 0.1 V
TDP29.4 W
Tcase0 °C – 90 °C
Tstorage-40 °C – 100 °C

Duron 650 based on the Spitfire core was a 32-bit x86 microprocessor developed by AMD and introduced in 2000. This model was part of the first series of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 650 MHz with a bus capable of 200 MT/s with a typical TDP of 29.4 W.

Cache[edit]

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
  • Halt State
  • Sleep State

Documents[edit]

DataSheet[edit]

Other[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/d650aut1b&oldid=69945"
Facts about "Duron 650 (Spitfire) - AMD"
RDF feed
base frequency550 MHz (0.55 GHz, 550,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier6.5 +
core count1 +
core family6 +
core model3 +
core nameSpitfire +
core stepping0 +
core voltage1.6 V (16 dV, 160 cV, 1,600 mV) +
core voltage tolerance0.1 V +
cpuid630 +
designerAMD +
die area100 mm² (0.155 in², 1 cm², 100,000,000 µm²) +
familyDuron +
first announcedJune 5, 2000 +
first launchedJune 19, 2000 +
full page nameamd/duron/d650aut1b +
has featureHalt State + and Sleep State +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateJune 19, 2000 +
manufacturerAMD +
market segmentDesktop +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberDuron 650 +
nameDuron 650 +
part numberD650AUT1B + and D0650AUT1B +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesDuron Desktop +
smp max ways1 +
tdp29.4 W (29,400 mW, 0.0394 hp, 0.0294 kW) +
technologyCMOS +
thread count1 +
transistor count25,000,000 +
word size32 bit (4 octets, 8 nibbles) +