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Difference between revisions of "amd/k6-2/k6-2e-233afr"
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(Created page with "{{amd title|K6-2E-233AFR}} '''K6-2/233AFR''' was a {{arch|32}} x86 {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in 1998 by AMD...")
 
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{{amd title|K6-2E-233AFR}}
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{{amd title|K6-2E/233AFR}}
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'''K6-2/233AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1998]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 233 MHz and had a [[FSB]] operating at 66 MHz.
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{{chip
 +
| name                = K6-2E/233AFR
 +
| no image            = No
 +
| image              =
 +
| image size          =
 +
| caption            =
 +
| designer            = AMD
 +
| manufacturer        = AMD
 +
| model number        = K6-2E/233AFR
 +
| part number        = AMD-K6-2E/233AFR
 +
| part number 2      =
 +
| part number 3      =
 +
| part number 4      =
 +
| market              = Embedded
 +
| first announced    = May, 1999
 +
| first launched      = May, 1999
 +
| last order          =
 +
| last shipment      =
 +
 
 +
| family              = K6-2
 +
| series              = K6-2 Desktop
 +
| locked              =
 +
| frequency          = 233.33 MHz
 +
| bus type            = FSB
 +
| bus speed          = 66.66 MHz
 +
| bus rate            = 66.66 MT/s
 +
| clock multiplier    = 3.5
 +
| cpuid              = 58C
 +
 
 +
| microarch          = K6-2
 +
| platform            = Super 7
 +
| chipset            =
 +
| core name          = Chomper Extended
 +
| core family        = 5
 +
| core model          = 8
 +
| core stepping      = 12
 +
| process            = 0.25 µm
 +
| transistors        = 9,300,000
 +
| technology          = CMOS
 +
| die size            = 81 mm²
 +
| word size          = 32 bit
 +
| core count          = 1
 +
| thread count        = 1
 +
| max cpus            = 1
 +
| max memory          = 4 GiB
 +
 
 +
 
 +
| power              = 9 W
 +
| v core              = 2.2 V
 +
| v core tolerance    = 0.1 V
 +
| v io                = 3.3675 V
 +
| v io tolerance      = 7%
 +
| sdp                =
 +
| tdp                =
 +
| temp min            =
 +
| temp max            =
 +
| tjunc min          =
 +
| tjunc max          =
 +
| tcase min          = 0 °C
 +
| tcase max          = 70 °C
 +
| tstorage min        = -65 °C
 +
| tstorage max        = 150 °C
 +
 
 +
| packaging          = Yes
 +
| package 0          = CPGA-321
 +
| package 0 type      = CPGA
 +
| package 0 pins      = 321
 +
| package 0 pitch    = 1.27 mm
 +
| package 0 width    = 49.53 mm
 +
| package 0 length    = 49.53 mm
 +
| package 0 height    = 3.27 mm
 +
| socket 0            = Super 7
 +
| socket 0 type      = PGA-321
 +
| socket 0 2          = Socket 7
 +
| socket 0 2 type    = PGA-321
 +
}}
 +
'''K6-2E/233AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 233 MHz and had a [[FSB]] operating at 66 MHz.
  
 
== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}}
 
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}}
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[[L2$]] can be 512 KB to 2 MB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip.
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[[L2$]] can be 512 KiB to 2 MiB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip.
 
{{cache info
 
{{cache info
−
|l1i cache=32 KB
+
|l1i cache=32 KiB
−
|l1i break=1x32 KB
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|l1i break=1x32 KiB
 
|l1i desc=2-way set associative
 
|l1i desc=2-way set associative
 
|l1i extra=
 
|l1i extra=
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|l1d cache=32 KB
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|l1d cache=32 KiB
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|l1d break=1x32 KB
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|l1d break=1x32 KiB
 
|l1d desc=2-way set associative
 
|l1d desc=2-way set associative
 
|l1d extra=
 
|l1d extra=
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== Features ==
 
== Features ==
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{{mpu features
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{{x86 features
 
| mmx  = true
 
| mmx  = true
 
| 3dnow = true
 
| 3dnow = true

Latest revision as of 15:09, 13 December 2017

Edit Values
K6-2E/233AFR
General Info
DesignerAMD
ManufacturerAMD
Model NumberK6-2E/233AFR
Part NumberAMD-K6-2E/233AFR
MarketEmbedded
IntroductionMay, 1999 (announced)
May, 1999 (launched)
ShopAmazon
General Specs
FamilyK6-2
SeriesK6-2 Desktop
Frequency233.33 MHz
Bus typeFSB
Bus speed66.66 MHz
Bus rate66.66 MT/s
Clock multiplier3.5
CPUID58C
Microarchitecture
MicroarchitectureK6-2
PlatformSuper 7
Core NameChomper Extended
Core Family5
Core Model8
Core Stepping12
Process0.25 µm
Transistors9,300,000
TechnologyCMOS
Die81 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation9 W
Vcore2.2 V ± 0.1 V
VI/O3.3675 V ± 7%
Tcase0 °C – 70 °C
Tstorage-65 °C – 150 °C

K6-2E/233AFR was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 233 MHz and had a FSB operating at 66 MHz.

Cache[edit]

Main article: K6-2 § Cache

L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

  • Auto-power down state
  • Stop clock state

Documents[edit]

DataSheet[edit]

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Facts about "K6-2E/233AFR - AMD"
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l1d$ description2-way set associative +
l1i$ description2-way set associative +