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{{ambric title|Am2045}}
 
{{ambric title|Am2045}}
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{{mpu
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{{chip
 
| name                = Am2045
 
| name                = Am2045
 
| no image            =  
 
| no image            =  
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| designer            = Ambric
 
| designer            = Ambric
 
| manufacturer        =  
 
| manufacturer        =  
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| model number        =  
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| model number        = Am2045
 
| part number        = Am2045
 
| part number        = Am2045
 
| part number 2      = Am2045A
 
| part number 2      = Am2045A
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| frequency          = 333 MHz
 
| frequency          = 333 MHz
 
| bus type            =  
 
| bus type            =  
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| bus speed          =  
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| bus speed          = 100 MHz
 
| bus rate            =  
 
| bus rate            =  
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| clock multiplier    =  
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| clock multiplier    = 3.3
  
 
| microarch          = Ambric  
 
| microarch          = Ambric  
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| die size            =  
 
| die size            =  
 
| word size          = 32 bit
 
| word size          = 32 bit
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| core count          = 360
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| core count          = 344
 
| thread count        =  
 
| thread count        =  
 
| max cpus            =  
 
| max cpus            =  
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| max memory          =  
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| max memory          = 4 GiB
  
 
| electrical          =  
 
| electrical          =  
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| socket 0 type      = BGA
 
| socket 0 type      = BGA
 
}}
 
}}
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'''Am2045''' (later renamed '''Am2045A'''), codename '''[[codename::Kestrel]]''', was [[Ambric]]'s original flagship [[MPPA]] introduced in late 2006. This model was made of {{ambric|am2000#Architecture|43 Brics}} arranged as a grid of about 5x9, making up a total of 344 {{arch|32}} [[RICS]]-like cores operating asynchronously at 1-333 MHz. This model was later replace with {{\\|Am2045B}}.
 +
 +
Originally this chip was supposed to have 45 Brics, hence the '2045' which was supposed to have 360 cores. However the final model only had 43 bric for 344 cores instead. Earlier models might have had only 42 brics at one point for 336 cores.
 +
 +
== Architecture ==
 +
{{main|ambric/am2000#Architecture|l1=Am2000 § Architecture}}
 +
The Am2045 is made of 43 homogeneous 'Brics' laid out in a 5 by 9 grid to form 344 cores and 344 RAM units.
 +
 +
General layout:
 +
* 43x Brics
 +
** 2x Computer Unit (CU)
 +
*** 2x SRD {{arch|32}} CPU
 +
*** 2x RD {{arch|32}} CPU
 +
** 2x [[RAM]] Unit (RU)
 +
*** 4x 2 KB [[SRAM]] bank
 +
 +
== Cache ==
 +
The Am2045 contains 43 Brics, each with its own [[RAM]] Unit (RU) of 13 kB of SRAM for a total of 559 kB of SRAM.
 +
 +
== Memory controller ==
 +
{{integrated memory controller
 +
| type              = DDR2-400
 +
| controllers        = 2
 +
| channels          = 1
 +
| ecc support        =
 +
| max bandwidth      =
 +
| bandwidth schan    =
 +
| bandwidth dchan    =
 +
| max memory        = 4 GiB
 +
}}
 +
 +
== Expansions ==
 +
* [[has feature::PCIe]]
 +
* [[has feature::JTAG]]
 +
* 128x [[has feature::GPIO]] @ 100 MHz
 +
* [[has feature::serial flash]]
 +
 +
== Die Shot ==
 +
{|
 +
| [[File:Am2045 die shot.png]]  || [[File:Am2045 die shot (annotated).png]]
 +
|}

Latest revision as of 14:16, 13 December 2017

Edit Values
Am2045
ambric 2045.gif
Am2045
General Info
DesignerAmbric
Model NumberAm2045
Part NumberAm2045,
Am2045A
MarketEmbedded
IntroductionOctober 10, 2006 (announced)
January 2007 (launched)
End-of-life2012 (last order)
2012 (last shipment)
General Specs
FamilyAm2000
SeriesGen 1
LockedNo
Frequency333 MHz
Bus speed100 MHz
Clock multiplier3.3
Microarchitecture
MicroarchitectureAmbric
Process130 nm
Transistors117,000,000
TechnologyCMOS
Word Size32 bit
Cores344
Max Memory4 GiB

Am2045 (later renamed Am2045A), codename Kestrel, was Ambric's original flagship MPPA introduced in late 2006. This model was made of 43 Brics arranged as a grid of about 5x9, making up a total of 344 32-bit RICS-like cores operating asynchronously at 1-333 MHz. This model was later replace with Am2045B.

Originally this chip was supposed to have 45 Brics, hence the '2045' which was supposed to have 360 cores. However the final model only had 43 bric for 344 cores instead. Earlier models might have had only 42 brics at one point for 336 cores.

Architecture[edit]

Main article: Am2000 § Architecture

The Am2045 is made of 43 homogeneous 'Brics' laid out in a 5 by 9 grid to form 344 cores and 344 RAM units.

General layout:

  • 43x Brics

Cache[edit]

The Am2045 contains 43 Brics, each with its own RAM Unit (RU) of 13 kB of SRAM for a total of 559 kB of SRAM.

Memory controller[edit]

Integrated Memory Controller
Type DDR2-400
Controllers 2
Channels 1
Max memory 4 GiB

Expansions[edit]

  • PCIe
  • JTAG
  • 128x GPIO @ 100 MHz
  • serial flash

Die Shot[edit]

Am2045 die shot.png Am2045 die shot (annotated).png
Retrieved from "https://en.wikichip.org/w/index.php?title=ambric/am2000/am2045&oldid=69230"
Facts about "Am2045 - Ambric"
RDF feed
base frequency333 MHz (0.333 GHz, 333,000 kHz) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
clock multiplier3.3 +
codenameKestrel +
core count344 +
designerAmbric +
familyAm2000 +
first announcedOctober 10, 2006 +
first launchedJanuary 2007 +
full page nameambric/am2000/am2045 +
has featurePCIe +, JTAG +, GPIO + and serial flash +
has locked clock multiplierfalse +
instance ofmicroprocessor +
last order2012 +
last shipment2012 +
ldateJanuary 2007 +
main imageFile:ambric 2045.gif +
main image captionAm2045 +
market segmentEmbedded +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
microarchitectureAmbric +
model numberAm2045 +
nameAm2045 +
part numberAm2045 + and Am2045A +
process130 nm (0.13 μm, 1.3e-4 mm) +
seriesGen 1 +
technologyCMOS +
transistor count117,000,000 +
word size32 bit (4 octets, 8 nibbles) +