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Difference between revisions of "intel/xeon e7/e7-2820"
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{{intel title|Xeon E7-2820}} | {{intel title|Xeon E7-2820}} | ||
− | {{ | + | {{chip |
| name = Xeon E7-2820 | | name = Xeon E7-2820 | ||
| no image = Yes | | no image = Yes | ||
Line 10: | Line 10: | ||
| model number = E7-2820 | | model number = E7-2820 | ||
| part number = AT80615007245AA | | part number = AT80615007245AA | ||
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Server | | market = Server | ||
| first announced = April 5, 2011 | | first announced = April 5, 2011 | ||
Line 18: | Line 18: | ||
| last order = August 21, 2015 | | last order = August 21, 2015 | ||
| last shipment = February 2, 2018 | | last shipment = February 2, 2018 | ||
+ | | release price = $1334.00 | ||
| family = Xeon E7 | | family = Xeon E7 | ||
Line 24: | Line 25: | ||
| frequency = 1,999.99 MHz | | frequency = 1,999.99 MHz | ||
| turbo frequency = Yes | | turbo frequency = Yes | ||
− | | turbo frequency1 = | + | | turbo frequency1 = 2,266.66 MHz |
| turbo frequency2 = 2,266.66 MHz | | turbo frequency2 = 2,266.66 MHz | ||
− | | turbo frequency3 = | + | | turbo frequency3 = 2,133.33 MHz |
| turbo frequency4 = 2,133.33 MHz | | turbo frequency4 = 2,133.33 MHz | ||
− | | turbo frequency5 = | + | | turbo frequency5 = 2,133.33 MHz |
| turbo frequency6 = 2,133.33 MHz | | turbo frequency6 = 2,133.33 MHz | ||
− | | turbo frequency7 = | + | | turbo frequency7 = 2,133.33 MHz |
| turbo frequency8 = 2,133.33 MHz | | turbo frequency8 = 2,133.33 MHz | ||
| bus type = QPI | | bus type = QPI | ||
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| cpuid = 206F2 | | cpuid = 206F2 | ||
+ | | isa family = x86 | ||
+ | | isa = x86-64 | ||
| microarch = Westmere | | microarch = Westmere | ||
− | | platform = | + | | platform = Boxboro |
| chipset = Boxboro | | chipset = Boxboro | ||
| core name = Westmere EX | | core name = Westmere EX | ||
Line 56: | Line 59: | ||
| thread count = 16 | | thread count = 16 | ||
| max cpus = 2 | | max cpus = 2 | ||
− | | max memory = 1 | + | | max memory = 1 TiB |
+ | |||
− | |||
| v core = 1.35 V | | v core = 1.35 V | ||
| v core tolerance = | | v core tolerance = | ||
Line 76: | Line 79: | ||
| tstorage max = 85 °C | | tstorage max = 85 °C | ||
− | + | | package module 1 = {{packages/intel/lga-1567}} | |
− | |||
− | |||
− | |||
− | | package | ||
− | |||
− | |||
− | |||
− | |||
− | |||
}} | }} | ||
− | '''Xeon E7-2820''' is a {{arch|64}} octa-core [[x86]] data center microprocessor that supports up to 2 sockets. This first generation {{intel|Xeon E7}} processor, {{intel|Westmere|Westmere}}-based, operates at a base frequency of 2 GHz with {{intel|turbo boost technology| | + | '''Xeon E7-2820''' is a {{arch|64}} octa-core [[x86]] data center microprocessor that supports up to 2 sockets. This first generation {{intel|Xeon E7}} processor, {{intel|Westmere|Westmere}}-based, operates at a base frequency of 2 GHz with {{intel|turbo boost technology|turbo}} frequency of 2.266 GHz for 2 active cores. This chip has a TDP of 105 W, supporting up to 4 channels of DDR3 with support of up to 1 TB of memory. |
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}} | {{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}} | ||
− | {{cache | + | {{cache size |
− | |l1i cache=256 | + | |l1 cache = 512 KiB |
− | |l1i break=8x32 | + | |l1i cache=256 KiB |
+ | |l1i break=8x32 KiB | ||
|l1i desc=4-way set associative | |l1i desc=4-way set associative | ||
− | |l1i | + | |l1i policy=write-back |
− | |l1d cache=256 | + | |l1d cache=256 KiB |
− | |l1d break=8x32 | + | |l1d break=8x32 KiB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
− | |l1d | + | |l1d policy=write-back |
− | |l2 cache=2 | + | |l2 cache=2 MiB |
− | |l2 break=8x256 | + | |l2 break=8x256 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
− | |l2 | + | |l2 policy=write-back |
− | |l3 cache=18 | + | |l3 cache=18 MiB |
− | |l3 break= | + | |l3 break=8x3 MiB |
|l3 desc=16-way set associative | |l3 desc=16-way set associative | ||
− | |l3 | + | |l3 policy=write-back |
}} | }} | ||
Line 114: | Line 109: | ||
== Memory controller == | == Memory controller == | ||
− | {{ | + | {{memory controller |
− | | type | + | |type=DDR3-1066 |
− | | | + | |ecc=Yes |
− | | | + | |max mem=1 TiB |
− | | controllers | + | |controllers=1 |
− | | channels | + | |channels=4 |
− | | | + | |max bandwidth=31.77 GiB/s |
− | | | + | |bandwidth schan=7.942 GiB/s |
− | | bandwidth | + | |bandwidth dchan=15.88 GiB/s |
− | | bandwidth | + | |bandwidth tchan=23.83 GiB/s |
− | | | + | |bandwidth qchan=31.77 GiB/s |
}} | }} | ||
− | == Features == | + | == Features == |
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |3dnow=No |
− | | | + | |e3dnow=No |
− | | | + | |mmx=Yes |
− | + | |emmx=Yes | |
− | | | + | |sse=Yes |
− | | sse | + | |sse2=Yes |
− | | sse2 | + | |sse3=Yes |
− | | sse3 | + | |ssse3=Yes |
− | | ssse3 | + | |sse41=Yes |
− | | | + | |sse42=Yes |
− | | | + | |sse4a=No |
− | | | + | |avx=No |
− | | | + | |avx2=No |
− | | | + | |
− | | | + | |abm=No |
− | | | + | |tbm=No |
− | | bmi1 | + | |bmi1=No |
− | | bmi2 | + | |bmi2=No |
− | | f16c | + | |fma3=No |
− | | | + | |fma4=No |
− | | mpx | + | |aes=Yes |
− | | sgx | + | |rdrand=No |
− | | | + | |sha=No |
− | | | + | |xop=No |
− | | | + | |adx=No |
− | | | + | |clmul=No |
+ | |f16c=No | ||
+ | |tbt1=Yes | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |isrt=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdv=No | ||
+ | |rvi=No | ||
}} | }} |
Latest revision as of 05:10, 18 February 2020
Edit Values | ||||||||||||
Xeon E7-2820 | ||||||||||||
General Info | ||||||||||||
Designer | Intel | |||||||||||
Manufacturer | Intel | |||||||||||
Model Number | E7-2820 | |||||||||||
Part Number | AT80615007245AA | |||||||||||
S-Spec | SLC3R | |||||||||||
Market | Server | |||||||||||
Introduction | April 5, 2011 (announced) April 5, 2011 (launched) | |||||||||||
End-of-life | August 21, 2015 (last order) February 2, 2018 (last shipment) | |||||||||||
Release Price | $1334.00 | |||||||||||
Shop | Amazon | |||||||||||
General Specs | ||||||||||||
Family | Xeon E7 | |||||||||||
Series | E7-2800 | |||||||||||
Locked | Yes | |||||||||||
Frequency | 1,999.99 MHz | |||||||||||
Turbo Frequency | Yes | |||||||||||
Turbo Frequency | 2,266.66 MHz (1 core), 2,266.66 MHz (2 cores), 2,133.33 MHz (3 cores), 2,133.33 MHz (4 cores), 2,133.33 MHz (5 cores), 2,133.33 MHz (6 cores), 2,133.33 MHz (7 cores), 2,133.33 MHz (8 cores) | |||||||||||
Bus type | QPI | |||||||||||
Bus rate | 5.86 GT/s | |||||||||||
Clock multiplier | 15 | |||||||||||
CPUID | 206F2 | |||||||||||
Microarchitecture | ||||||||||||
ISA | x86-64 (x86) | |||||||||||
Microarchitecture | Westmere | |||||||||||
Platform | Boxboro | |||||||||||
Chipset | Boxboro | |||||||||||
Core Name | Westmere EX | |||||||||||
Core Family | 6 | |||||||||||
Core Model | 47 | |||||||||||
Core Stepping | A2 | |||||||||||
Process | 32 nm | |||||||||||
Transistors | 2,600,000,000 | |||||||||||
Technology | CMOS | |||||||||||
Die | 513 mm² | |||||||||||
Word Size | 64 bit | |||||||||||
Cores | 8 | |||||||||||
Threads | 16 | |||||||||||
Max Memory | 1 TiB | |||||||||||
Multiprocessing | ||||||||||||
Max SMP | 2-Way (Multiprocessor) | |||||||||||
Electrical | ||||||||||||
Vcore | 1.35 V | |||||||||||
TDP | 105 W | |||||||||||
Tcase | 5 °C – 64 °C | |||||||||||
Tstorage | -40 °C – 85 °C | |||||||||||
Packaging | ||||||||||||
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Xeon E7-2820 is a 64-bit octa-core x86 data center microprocessor that supports up to 2 sockets. This first generation Xeon E7 processor, Westmere-based, operates at a base frequency of 2 GHz with turbo frequency of 2.266 GHz for 2 active cores. This chip has a TDP of 105 W, supporting up to 4 channels of DDR3 with support of up to 1 TB of memory.
Contents
Cache[edit]
- Main article: Westmere § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics[edit]
This SoC has no integrated graphics processing unit.
Memory controller[edit]
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Integrated Memory Controller
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Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon E7-2820 - Intel"
l1d$ description | 8-way set associative + |
l1i$ description | 4-way set associative + |
l2$ description | 8-way set associative + |
l3$ description | 16-way set associative + |
l3$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |