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Difference between revisions of "amd/am186ex/am186er–40vc\w"
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| model number = Am186ER–40VC\W | | model number = Am186ER–40VC\W | ||
| part number = Am186ER–40VC\W | | part number = Am186ER–40VC\W | ||
| − | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Embedded | | market = Embedded | ||
| first announced = May 1996 | | first announced = May 1996 | ||
| Line 43: | Line 43: | ||
| thread count = | | thread count = | ||
| max cpus = 1 | | max cpus = 1 | ||
| − | | max memory = 1 | + | |
| + | | sram = 32 KB | ||
| + | | max memory = 1 MiB | ||
| electrical = Yes | | electrical = Yes | ||
| Line 85: | Line 87: | ||
{{main|intel/microarchitectures/80186#Memory_Hierarchy|l1=80186 § Cache}} | {{main|intel/microarchitectures/80186#Memory_Hierarchy|l1=80186 § Cache}} | ||
{{cache info | {{cache info | ||
| − | |l1 cache=0 | + | |l1 cache=0 KiB |
| − | |l1 break=1x0 | + | |l1 break=1x0 KiB |
|l1 desc= | |l1 desc= | ||
|l1 extra= | |l1 extra= | ||
| − | |l2 cache=0 | + | |l2 cache=0 KiB |
| − | |l2 break=1x0 | + | |l2 break=1x0 KiB |
}} | }} | ||
Latest revision as of 15:58, 30 June 2017
| Am186ER–40VC\W | |||||||||||
| Designer | AMD | ||||||||||
| Manufacturer | AMD | ||||||||||
| Model Number | Am186ER–40VC\W | ||||||||||
| Part Number | Am186ER–40VC\W | ||||||||||
| Market | Embedded | ||||||||||
| Introduction | May 1996 (announced) October 1996 (launch) | ||||||||||
| General information | |||||||||||
| Family | Am186Ex | ||||||||||
| Series | Am186ER | ||||||||||
| Frequency | 40 MHz 0.04 GHz
40,000 kHz | ||||||||||
| Bus speed | 10 MHz 0.01 GHz
10,000 kHz | ||||||||||
| Bus rate | 10 MT/s 0.01 GT/s
10,000 kT/s | ||||||||||
| Microarchitecture | |||||||||||
| Microarchitecture | 80186 | ||||||||||
| Core name | Am186 | ||||||||||
| Process | 350 nm 0.35 μm
3.5e-4 mm | ||||||||||
| Word size | 16 bit 2 octets
4 nibbles | ||||||||||
| Core count | 1 | ||||||||||
| Max CPUs | 1 | ||||||||||
| Electrical | |||||||||||
| Vcore | 3.3 V 33 dV ± 0.3 V
330 cV 3,300 mV | ||||||||||
| Tcase | 0 °C 273.15 K – 100 °C32 °F 491.67 °R 373.15 K
212 °F 671.67 °R | ||||||||||
| Tstorage | -65 °C 208.15 K – 125 °C-85 °F 374.67 °R 398.15 K
257 °F 716.67 °R | ||||||||||
| SRAM | 32 KB | ||||||||||
| Max Memory | 1 MiB 1,024 KiB
1,048,576 B 9.765625e-4 GiB 9.536743e-7 TiB | ||||||||||
| Pins | |||||||||||
| Pins | 100 | ||||||||||
| IRQ lines | 6 | ||||||||||
| I/O ports | 32 | ||||||||||
| Packaging | |||||||||||
| |||||||||||
Am186ER–40VC\W is a microcontroller designed by AMD. This MCU incorporated the Am186 core which operated at 40 MHz. This model supported all the base features such as 32 general purpose I/O ports, timers, and SSI. Additionally, this MCU also integrates 32 KB SRAM on-die.
Cache[edit]
- Main article: 80186 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
| L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- Single clock input
- Interrupt Control Unit
- General Purpose DMA (2 independent channels)
- 3 x 16-bit timers
- Watchdog Timer
- UART
- 32x General Purpose IO
- Synchronous Serial Interface
- Watchdog timer can generate NMI or reset
- 6 x external interrupts
- 32 KB SRAM
Documents[edit]
Datasheets[edit]
- Am186ER; Publication #20732
Manuals[edit]
Facts about "Am186ER–40VC\W - AMD"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Am186ER–40VC\W - AMD#package_1 + |
| base frequency | 40 MHz (0.04 GHz, 40,000 kHz) + |
| bus rate | 10 MT/s (0.01 GT/s, 10,000 kT/s) + |
| bus speed | 10 MHz (0.01 GHz, 10,000 kHz) + |
| core count | 1 + |
| core name | Am186 + |
| core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| core voltage tolerance | 0.3 V + |
| designer | AMD + |
| family | Am186Ex + |
| first announced | May 1996 + |
| first launched | October 1996 + |
| full page name | amd/am186ex/am186er–40vc\w + |
| instance of | microcontroller + |
| l1$ size | 0 KiB (0 B, 0 MiB) + |
| l2$ size | 0 MiB (0 KiB, 0 B, 0 GiB) + |
| manufacturer | AMD + |
| market segment | Embedded + |
| max case temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
| max memory | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB, 9.536743e-7 TiB) + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | 80186 + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
| model number | Am186ER–40VC\W + |
| name | Am186ER–40VC\W + |
| package | TQFP-100 + |
| part number | Am186ER–40VC\W + |
| pin count | 100 + |
| process | 350 nm (0.35 μm, 3.5e-4 mm) + |
| series | Am186ER + |
| word size | 16 bit (2 octets, 4 nibbles) + |