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Difference between revisions of "amd/am5x86/am486dx5-133v16bhc"
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{{amd title|AM486DX5-133V16BHC}}
 
{{amd title|AM486DX5-133V16BHC}}
{{mpu
+
{{chip
 
| name                = AM486DX5-133V16BHC
 
| name                = AM486DX5-133V16BHC
 
| no image            =  
 
| no image            =  
| image              =  
+
| image              = Kl AMD Am5x86-P75 PQFP.jpg
 
| image size          =  
 
| image size          =  
| caption            =  
+
| caption            = AM486DX5-133V16BHC
 
| designer            = AMD
 
| designer            = AMD
 
| manufacturer        = AMD
 
| manufacturer        = AMD
 
| model number        = AM486DX5-133V16BHC
 
| model number        = AM486DX5-133V16BHC
 
| part number        = AM486DX5-133V16BHC
 
| part number        = AM486DX5-133V16BHC
| part number 1       =  
+
| part number 2       =  
 
| market              = Desktop
 
| market              = Desktop
 
| market 2            = Embedded
 
| market 2            = Embedded
 
| first announced    =  
 
| first announced    =  
| first launched      = 1996
+
| first launched      = 1997
 
| last order          =  
 
| last order          =  
 
| last shipment      =  
 
| last shipment      =  
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| thread count        =  
 
| thread count        =  
 
| max cpus            = 1
 
| max cpus            = 1
| max memory          = 4 GB
+
| max memory          = 4 GiB
 
| max memory addr    =  
 
| max memory addr    =  
  
| electrical          = Yes
+
 
 
| power              =  
 
| power              =  
 
| v core              = 3.3 V
 
| v core              = 3.3 V
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{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{cache info
 
{{cache info
|l1 cache=16 KB
+
|l1 cache=16 KiB
|l1 break=1x16 KB
+
|l1 break=1x16 KiB
 
|l1 desc=4-way set associative
 
|l1 desc=4-way set associative
 
|l1 extra=(unified, write-back policy)
 
|l1 extra=(unified, write-back policy)
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== Features ==
 
== Features ==
 
* [[has feature::System Management Mode]] (SMM)
 
* [[has feature::System Management Mode]] (SMM)
 +
* [[processor p-rating::P75]] [[P-Rating]]
  
 
== Documents ==
 
== Documents ==
* [[File:AMD Enhanced Am486 (March, 1997).pdf|AM486DX5-133V16BHC Datasheet (March, 1997)]]
+
* [[:File:AMD Enhanced Am486 (March, 1997).pdf|AM486DX5-133V16BHC Datasheet (March, 1997)]]
 +
 
 +
== Gallery ==
 +
<gallery>
 +
File:Ic-photo-AMD--AM486DX5-133V16BHC--(Am5x86-P75)--(486-CPU).JPG
 +
</gallery>
  
 
== See also ==
 
== See also ==
 
* {{amd|Am5x86|Am5x86 family}}
 
* {{amd|Am5x86|Am5x86 family}}
 
* {{amd|Am486|Am486 family}}
 
* {{amd|Am486|Am486 family}}

Latest revision as of 14:19, 13 December 2017

Edit Values
AM486DX5-133V16BHC
Kl AMD Am5x86-P75 PQFP.jpg
AM486DX5-133V16BHC
General Info
DesignerAMD
ManufacturerAMD
Model NumberAM486DX5-133V16BHC
Part NumberAM486DX5-133V16BHC
MarketDesktop, Embedded
Introduction1997 (launched)
ShopAmazon
General Specs
FamilyAm5x86
Frequency133 MHz
Bus typeFSB
Bus speed33 MHz
Bus rate33 MT/s
Clock multiplier4
CPUID04Ex, 04Fx
Microarchitecture
Microarchitecture80486
Core Name5x
Process350 nm
Transistors1,600,000
TechnologyCMOS
Die43 mm²
Word Size32 bit
Cores1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore3.3 V ± 0.3 V
Tcase0 °C – 85 °C

The AM486DX5-133V16BHC was a high-performance 486-based microprocessor introduced by AMD in 1996 as part of their Am5x86 family. This processor had a clock multiplier of 4x, operating at 133 MHz with a bus speed of 33 MHz. This MPU had all the features offered by AMD's Enhanced Am486 such as a large 16 KB L1$ and various power management features. AMD marketed this chip as Pentium-75-comparable performance.

Cache[edit]

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 16 KiB
16,384 B
0.0156 MiB
1x16 KiB 4-way set associative (unified, write-back policy)

Graphics[edit]

This chip had no integrated graphics processing unit.

Features[edit]

  • System Management Mode (SMM)
  • P75 P-Rating

Documents[edit]

Gallery[edit]

See also[edit]

has featureSystem Management Mode +
l1$ description4-way set associative +