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Difference between revisions of "intel/80486/486sx2-50"
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{{intel title|i486SX2-50}} | {{intel title|i486SX2-50}} | ||
− | {{ | + | {{chip |
| name = Intel i486SX2-50 | | name = Intel i486SX2-50 | ||
− | | image = | + | | image = KL intel i486SX2.jpg |
| image size = | | image size = | ||
| caption = A80486SX2-50, S-Spec SX845 | | caption = A80486SX2-50, S-Spec SX845 | ||
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| core count = 1 | | core count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
+ | |||
− | |||
| power = 3.08 W | | power = 3.08 W | ||
| v core = 5 V | | v core = 5 V | ||
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{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
− | |l1 cache=8 | + | |l1 cache=8 KiB |
− | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
|l1 extra=(unified, write-through policy) | |l1 extra=(unified, write-through policy) | ||
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== Features == | == Features == | ||
* {{intel|System Management Mode}} (SMM) | * {{intel|System Management Mode}} (SMM) | ||
+ | |||
+ | == Gallery == | ||
+ | <gallery> | ||
+ | File:Ic-photo-intel-A80486SX2-50-(486SX2).png|A80486SX2-50, S-Spec SX845 | ||
+ | </gallery> | ||
== See also == | == See also == | ||
* {{intel|80486|80486 family}} | * {{intel|80486|80486 family}} |
Latest revision as of 15:14, 13 December 2017
Edit Values | |
Intel i486SX2-50 | |
A80486SX2-50, S-Spec SX845 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i486SX2-50 |
Part Number | A80486SX2-50, A80486SX250 |
S-Spec | SX845 Q0498 (QS), Q0576 (QS) |
Shop | Amazon |
General Specs | |
Family | 80486 |
Series | 486SX2 |
Frequency | 50 MHz |
Bus type | FSB |
Bus speed | 25 MHz |
Bus rate | 25 MT/s |
Clock multiplier | 2 |
CPUID | 45B |
Microarchitecture | |
Microarchitecture | 80486 |
Core Name | 486SX2 |
Process | 800 nm |
Transistors | 900,000 |
Technology | CMOS |
Word Size | 32 bit |
Cores | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 3.08 W |
Vcore | 5 V ± 5% |
OP Temperature | 0 °C – 85 °C |
i486SX2-50 was a fourth-generation x86 microprocessor introduced by Intel in the early 1990s. This chip, which is based on the 80486 microarchitecture, had a clock doubler operating at 50 MHz, twice the bus speed. In contrast to the i486DX chips, the i486SX line had no functional FPU on-die.
Contents
Cache[edit]
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- System Management Mode (SMM)
Gallery[edit]
See also[edit]
Facts about "i486SX2-50 - Intel"
base frequency | 50 MHz (0.05 GHz, 50,000 kHz) + |
bus rate | 25 MT/s (0.025 GT/s, 25,000 kT/s) + |
bus speed | 25 MHz (0.025 GHz, 25,000 kHz) + |
bus type | FSB + |
clock multiplier | 2 + |
core count | 1 + |
core name | 486SX2 + |
core voltage | 5 V (50 dV, 500 cV, 5,000 mV) + |
core voltage tolerance | 5% + |
cpuid | 45B + |
designer | Intel + |
family | 80486 + |
full page name | intel/80486/486sx2-50 + |
instance of | microprocessor + |
l1$ description | 4-way set associative + |
l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |
ldate | 1900 + |
main image | + |
main image caption | A80486SX2-50, S-Spec SX845 + |
manufacturer | Intel + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max operating temperature | 85 °C + |
microarchitecture | 80486 + |
min operating temperature | 0 °C + |
model number | i486SX2-50 + |
name | Intel i486SX2-50 + |
part number | A80486SX2-50 + and A80486SX250 + |
power dissipation | 3.08 W (3,080 mW, 0.00413 hp, 0.00308 kW) + |
process | 800 nm (0.8 μm, 8.0e-4 mm) + |
s-spec | SX845 + |
s-spec (qs) | Q0498 + and Q0576 + |
series | 486SX2 + |
smp max ways | 1 + |
technology | CMOS + |
transistor count | 900,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |