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Difference between revisions of "intel/80486/486sx-33"
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{{intel title|i486SX-33}} | {{intel title|i486SX-33}} | ||
− | {{ | + | {{chip |
| name = Intel i486SX-33 | | name = Intel i486SX-33 | ||
− | + | | image = A80486sx-33 sx680 observe.png | |
− | | image = | ||
| image size = | | image size = | ||
− | | caption = | + | | caption = A80486SX-33, S-Spec SX680, 1993, 28th week |
| designer = Intel | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
Line 29: | Line 28: | ||
| bus rate = 33 MT/s | | bus rate = 33 MT/s | ||
| clock multiplier = 1 | | clock multiplier = 1 | ||
− | | s-spec = | + | | s-spec = SK798 |
+ | | s-spec 2 = SK903 | ||
+ | | s-spec 3 = SX680 | ||
+ | | s-spec 4 = SX789 | ||
+ | | s-spec 5 = SX797 | ||
+ | | s-spec 6 = SX847 | ||
+ | | s-spec 7 = SX902 | ||
+ | | s-spec 8 = SX931 | ||
+ | | s-spec 9 = SX684 | ||
+ | | s-spec 10 = SX724 | ||
+ | | s-spec 11 = SX780 | ||
+ | | s-spec 12 = SX781 | ||
+ | | s-spec 13 = SX791 | ||
+ | | s-spec 14 = SX799 | ||
+ | | s-spec 15 = SX834 | ||
+ | | s-spec 16 = SX849 | ||
+ | | s-spec 17 = SX853 | ||
+ | | s-spec 18 = SX855 | ||
+ | | s-spec 19 = SX935 | ||
| s-spec es = | | s-spec es = | ||
− | | s-spec qs = | + | | s-spec qs = Q0384 |
+ | | s-spec qs 2 = Q0575 | ||
| cpuid = | | cpuid = | ||
Line 50: | Line 68: | ||
| core count = 1 | | core count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
− | + | ||
− | | power = | + | | power = 2.5 W |
| v core = 5 V | | v core = 5 V | ||
− | | v core tolerance = | + | | v core tolerance = 5% |
| temp max = 85 °C | | temp max = 85 °C | ||
| temp min = 0 °C | | temp min = 0 °C | ||
Line 78: | Line 96: | ||
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
− | |l1 cache=8 | + | |l1 cache=8 KiB |
− | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
|l1 extra=(unified, write-through policy) | |l1 extra=(unified, write-through policy) | ||
Line 89: | Line 107: | ||
== Features == | == Features == | ||
* {{intel|System Management Mode}} (SMM) | * {{intel|System Management Mode}} (SMM) | ||
+ | |||
+ | == Gallery == | ||
+ | <gallery> | ||
+ | File:Ic-photo-Intel--SB80486SX-33--(486-CPU).JPG|SB80486SX-33 | ||
+ | File:Ic-photo-intel-A80486SX-33-(486SX).png|A80486SX-33, S-Spec SX668 | ||
+ | File:Intel i486 sx 33mhz 2007 03 27.jpg|A80486SX-33, S-Spec SX797 | ||
+ | File:Intel I486SX.JPG|KU80486SX-33, S-Spec SX684 | ||
+ | File:KL Intel i486SX PQFP.jpg|SB80486SX-33, S-Spec SX855 | ||
+ | </gallery> | ||
== See also == | == See also == | ||
* {{intel|80486|80486 family}} | * {{intel|80486|80486 family}} |
Latest revision as of 15:14, 13 December 2017
Edit Values | |
Intel i486SX-33 | |
A80486SX-33, S-Spec SX680, 1993, 28th week | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i486SX-33 |
Part Number | A80486SX-33, A80486SX33, SB80486SX-33, FA80486SX-33, KU80486SX-33, FA80486SX33 |
S-Spec | SK798, SK903, SX680, SX789, SX797, SX847, SX902, SX931, SX684, SX724, SX780, SX781, SX791, SX799, SX834, SX849, SX853, SX855, SX935 Q0384 (QS), Q0575 (QS) |
Introduction | September 21, 1992 (launched) |
Shop | Amazon |
General Specs | |
Family | 80486 |
Series | 486SX |
Frequency | 33 MHz |
Bus type | FSB |
Bus speed | 33 MHz |
Bus rate | 33 MT/s |
Clock multiplier | 1 |
Microarchitecture | |
Microarchitecture | 80486 |
Core Name | 486SX |
Process | 1 µm, 800 nm |
Transistors | 1,185,000 |
Technology | CMOS |
Word Size | 32 bit |
Cores | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 2.5 W |
Vcore | 5 V ± 5% |
OP Temperature | 0 °C – 85 °C |
i486SX-33 was a fourth-generation x86 microprocessor introduced by Intel in 1991. This chip, which is based on the 80486 microarchitecture, operated at 33 MHz. In contrast to the i486DX chips, the i486SX line had no functional FPU on-die.
Contents
Cache[edit]
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- System Management Mode (SMM)