From WikiChip
Difference between revisions of "intel/core i7ee/i7-3960x"
< intel‎ | core i7ee

m
m (Reverted edits by 88.88.131.162 (talk) to last revision by 87.189.23.249)
 
(13 intermediate revisions by 5 users not shown)
Line 1: Line 1:
 
{{intel title|Core i7-3960X Extreme Edition}}
 
{{intel title|Core i7-3960X Extreme Edition}}
{{mpu
+
{{chip
 
| name                = Core i7-3960X Extreme Edition
 
| name                = Core i7-3960X Extreme Edition
 
| no image            = Yes
 
| no image            = Yes
Line 6: Line 6:
 
| image size          =  
 
| image size          =  
 
| caption            =  
 
| caption            =  
 +
| designer            = Intel
 
| manufacturer        = Intel
 
| manufacturer        = Intel
 
| model number        = i7-3960X
 
| model number        = i7-3960X
Line 37: Line 38:
 
| s-spec qs          = QBU9
 
| s-spec qs          = QBU9
 
| s-spec qs 2        = QBE7
 
| s-spec qs 2        = QBE7
| cpuid              = 206D6
+
| cpuid              = 206D7
  
 
| microarch          = Sandy Bridge
 
| microarch          = Sandy Bridge
Line 45: Line 46:
 
| core stepping 2    = C2
 
| core stepping 2    = C2
 
| process            = 32 nm
 
| process            = 32 nm
| transistors        =  
+
| transistors        = 2,270,000,000
 
| technology          = CMOS
 
| technology          = CMOS
| die size           =  
+
| die area           = 434.72 mm²
 +
| die width          = 20.8 mm
 +
| die length          = 20.9 mm
 
| word size          = 64 bit
 
| word size          = 64 bit
 
| core count          = 6
 
| core count          = 6
 
| thread count        = 12
 
| thread count        = 12
 
| max cpus            = 1
 
| max cpus            = 1
| max memory          = 64 GB
+
| max memory          = 64 GiB
 +
 
  
| electrical          = Yes
 
 
| sdp                =  
 
| sdp                =  
 
| tdp                = 130 W
 
| tdp                = 130 W
Line 70: Line 73:
 
| socket type        = LGA
 
| socket type        = LGA
 
}}
 
}}
The '''Core i7-3960X {{intel|Core i7EE|Extreme Edition}}''' was a {{arch|64}} high-end hexa-core [[microprocessor]] introduced by [[Intel]] in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in [[32 nm]] based on the {{intel|Sandy Bridge}} microarchitecture, this chip supports up to 64 GB (DDR3) of memory and has a Thermal Design Power of 130 W.
+
The '''Core i7-3960X {{intel|Core i7EE|Extreme Edition}}''' was a {{arch|64}} high-end hexa-core [[microprocessor]] introduced by [[Intel]] in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in [[32 nm]] based on the {{intel|Sandy Bridge}} microarchitecture, this chip supports up to 64 GiB (DDR3) of memory and has a Thermal Design Power of 130 W.
  
 
== Cache ==
 
== Cache ==
{{main|intel/microarchitectures/sandy bridge#Memory_Hierarchy|l1=Sandy Bridge's Cache}}
+
{{main|intel/microarchitectures/sandy bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}}
 
{{cache info
 
{{cache info
|l1i cache=192 KB
+
|l1i cache=192 KiB
|l1i break=6x32 KB
+
|l1i break=6x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
 
|l1i extra=(per core)
 
|l1i extra=(per core)
|l1d cache=192 KB
+
|l1d cache=192 KiB
|l1d break=6x32 KB
+
|l1d break=6x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
 
|l1d extra=(per core)
 
|l1d extra=(per core)
|l2 cache=1,536 KB
+
|l2 cache=1,536 KiB
|l2 break=6x256 KB
+
|l2 break=6x256 KiB
 
|l2 desc=8-way set associative
 
|l2 desc=8-way set associative
 
|l2 extra=(per core)
 
|l2 extra=(per core)
|l3 cache=15 MB
+
|l3 cache=15 MiB
|l3 break=
 
 
|l3 desc=20-way set associative
 
|l3 desc=20-way set associative
 
|l3 extra=(shared)
 
|l3 extra=(shared)
Line 107: Line 109:
 
| bandwidth schan    =  
 
| bandwidth schan    =  
 
| bandwidth dchan    =  
 
| bandwidth dchan    =  
| max memory        = 64 GB
+
| max memory        = 64 GiB
 
}}
 
}}
  
 
== Expansions ==
 
== Expansions ==
{{mpu expansions
+
{{expansions
 
| pcie revision      = 2.00
 
| pcie revision      = 2.00
 
| pcie lanes        = 40
 
| pcie lanes        = 40
Line 127: Line 129:
  
 
== Features ==
 
== Features ==
{{mpu features
+
{{x86 features
 
| em64t      = Yes
 
| em64t      = Yes
 
| nx          = Yes
 
| nx          = Yes
Line 162: Line 164:
  
 
* '''Note:''' VT-d support is only available on the C2 stepping version.
 
* '''Note:''' VT-d support is only available on the C2 stepping version.
 +
 +
== Die shot ==
 +
* 6 cores (Note: die contains 2 fused off cores)
 +
* 2,270,000,000 transistors
 +
* 20.8 mm x 20.9 mm
 +
* 434.72 mm²
 +
[[File:core i7-3960x extreme edition.png|650px]]
 +
 +
[[File:core i7-3960x extreme edition (annotated).png|650px]]
  
 
== See also ==
 
== See also ==
 
* {{intel|Core i7EE|Core i7 Extreme Edition}}
 
* {{intel|Core i7EE|Core i7 Extreme Edition}}

Latest revision as of 22:32, 22 September 2019

Edit Values
Core i7-3960X Extreme Edition
General Info
DesignerIntel
ManufacturerIntel
Model Numberi7-3960X
Part NumberCM8061907184018,
CM8061907184017,
BX80619I73960X
S-SpecSR0GW, SR0KF
QBU9 (QS), QBE7 (QS)
MarketDesktop
IntroductionNovember 14, 2011 (announced)
November 14, 2011 (launched)
End-of-lifeSeptember 26, 2014 (last order)
March 6, 2015 (last shipment)
ShopAmazon
General Specs
FamilyCore i7EE
SeriesCore i7-3900
LockedNo
Frequency3300 MHz
Turbo FrequencyYes
Turbo Frequency3900 MHz (1 core),
3900 MHz (2 cores),
3800 MHz (3 cores),
3800 MHz (4 cores),
3600 MHz (5 cores),
3600 MHz (6 cores)
Bus typeDMI 2.0
Bus rate5 GT/s
Clock multiplier33
CPUID206D7
Microarchitecture
MicroarchitectureSandy Bridge
Platform6 Series Chipset
Core NameSandy Bridge E
Core SteppingC1, C2
Process32 nm
Transistors2,270,000,000
TechnologyCMOS
Die434.72 mm²
20.9 mm × 20.8 mm
Word Size64 bit
Cores6
Threads12
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP130 W
OP Temperature0 °C – 66.8 °C

The Core i7-3960X Extreme Edition was a 64-bit high-end hexa-core microprocessor introduced by Intel in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in 32 nm based on the Sandy Bridge microarchitecture, this chip supports up to 64 GiB (DDR3) of memory and has a Thermal Design Power of 130 W.

Cache[edit]

Main article: Sandy Bridge § Cache
Cache Info [Edit Values]
L1I$ 192 KiB
196,608 B
0.188 MiB
6x32 KiB 8-way set associative (per core)
L1D$ 192 KiB
196,608 B
0.188 MiB
6x32 KiB 8-way set associative (per core)
L2$ 1,536 KiB
1.5 MiB
1,572,864 B
0.00146 GiB
6x256 KiB 8-way set associative (per core)
L3$ 15 MiB
15,360 KiB
15,728,640 B
0.0146 GiB
20-way set associative (shared)

Graphics[edit]

This SoC has no integrated graphics processing unit.

Memory controller[edit]

Integrated Memory Controller
Type DDR3-1066, DDR3-1333, DDR3-1600
Controllers 1
Channels 4
ECC Support No
Max bandwidth 51.2 GB/s
Max memory 64 GiB

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.00
Max Lanes40
Configsx1, x4, x8


Features[edit]

  • Note: VT-d support is only available on the C2 stepping version.

Die shot[edit]

  • 6 cores (Note: die contains 2 fused off cores)
  • 2,270,000,000 transistors
  • 20.8 mm x 20.9 mm
  • 434.72 mm²

core i7-3960x extreme edition.png

core i7-3960x extreme edition (annotated).png

See also[edit]

l1d$ description8-way set associative +
l1i$ description8-way set associative +
l2$ description8-way set associative +
l3$ description20-way set associative +