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Difference between revisions of "intel/core i7ee/i7-3960x"
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{{intel title|Core i7-3960X Extreme Edition}} | {{intel title|Core i7-3960X Extreme Edition}} | ||
− | {{ | + | {{chip |
| name = Core i7-3960X Extreme Edition | | name = Core i7-3960X Extreme Edition | ||
| no image = Yes | | no image = Yes | ||
Line 6: | Line 6: | ||
| image size = | | image size = | ||
| caption = | | caption = | ||
+ | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
| model number = i7-3960X | | model number = i7-3960X | ||
Line 37: | Line 38: | ||
| s-spec qs = QBU9 | | s-spec qs = QBU9 | ||
| s-spec qs 2 = QBE7 | | s-spec qs 2 = QBE7 | ||
− | | cpuid = | + | | cpuid = 206D7 |
| microarch = Sandy Bridge | | microarch = Sandy Bridge | ||
Line 45: | Line 46: | ||
| core stepping 2 = C2 | | core stepping 2 = C2 | ||
| process = 32 nm | | process = 32 nm | ||
− | | transistors = | + | | transistors = 2,270,000,000 |
| technology = CMOS | | technology = CMOS | ||
− | | die | + | | die area = 434.72 mm² |
+ | | die width = 20.8 mm | ||
+ | | die length = 20.9 mm | ||
| word size = 64 bit | | word size = 64 bit | ||
| core count = 6 | | core count = 6 | ||
| thread count = 12 | | thread count = 12 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 64 | + | | max memory = 64 GiB |
+ | |||
− | |||
| sdp = | | sdp = | ||
| tdp = 130 W | | tdp = 130 W | ||
Line 70: | Line 73: | ||
| socket type = LGA | | socket type = LGA | ||
}} | }} | ||
− | The '''Core i7-3960X {{intel|Core i7EE|Extreme Edition}}''' was a {{arch|64}} high-end hexa-core [[microprocessor]] introduced by [[Intel]] in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in [[32 nm]] based on the {{intel|Sandy Bridge}} microarchitecture, this chip supports up to 64 | + | The '''Core i7-3960X {{intel|Core i7EE|Extreme Edition}}''' was a {{arch|64}} high-end hexa-core [[microprocessor]] introduced by [[Intel]] in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in [[32 nm]] based on the {{intel|Sandy Bridge}} microarchitecture, this chip supports up to 64 GiB (DDR3) of memory and has a Thermal Design Power of 130 W. |
== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/sandy bridge#Memory_Hierarchy|l1=Sandy Bridge | + | {{main|intel/microarchitectures/sandy bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}} |
{{cache info | {{cache info | ||
− | |l1i cache=192 | + | |l1i cache=192 KiB |
− | |l1i break=6x32 | + | |l1i break=6x32 KiB |
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
|l1i extra=(per core) | |l1i extra=(per core) | ||
− | |l1d cache=192 | + | |l1d cache=192 KiB |
− | |l1d break=6x32 | + | |l1d break=6x32 KiB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d extra=(per core) | |l1d extra=(per core) | ||
− | |l2 cache=1,536 | + | |l2 cache=1,536 KiB |
− | |l2 break=6x256 | + | |l2 break=6x256 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 extra=(per core) | |l2 extra=(per core) | ||
− | |l3 cache=15 | + | |l3 cache=15 MiB |
− | |||
|l3 desc=20-way set associative | |l3 desc=20-way set associative | ||
|l3 extra=(shared) | |l3 extra=(shared) | ||
Line 107: | Line 109: | ||
| bandwidth schan = | | bandwidth schan = | ||
| bandwidth dchan = | | bandwidth dchan = | ||
− | | max memory = 64 | + | | max memory = 64 GiB |
}} | }} | ||
== Expansions == | == Expansions == | ||
− | {{ | + | {{expansions |
| pcie revision = 2.00 | | pcie revision = 2.00 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
Line 127: | Line 129: | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes | ||
Line 162: | Line 164: | ||
* '''Note:''' VT-d support is only available on the C2 stepping version. | * '''Note:''' VT-d support is only available on the C2 stepping version. | ||
+ | |||
+ | == Die shot == | ||
+ | * 6 cores (Note: die contains 2 fused off cores) | ||
+ | * 2,270,000,000 transistors | ||
+ | * 20.8 mm x 20.9 mm | ||
+ | * 434.72 mm² | ||
+ | [[File:core i7-3960x extreme edition.png|650px]] | ||
+ | |||
+ | [[File:core i7-3960x extreme edition (annotated).png|650px]] | ||
== See also == | == See also == | ||
* {{intel|Core i7EE|Core i7 Extreme Edition}} | * {{intel|Core i7EE|Core i7 Extreme Edition}} |
Latest revision as of 22:32, 22 September 2019
Edit Values | |
Core i7-3960X Extreme Edition | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i7-3960X |
Part Number | CM8061907184018, CM8061907184017, BX80619I73960X |
S-Spec | SR0GW, SR0KF QBU9 (QS), QBE7 (QS) |
Market | Desktop |
Introduction | November 14, 2011 (announced) November 14, 2011 (launched) |
End-of-life | September 26, 2014 (last order) March 6, 2015 (last shipment) |
Shop | Amazon |
General Specs | |
Family | Core i7EE |
Series | Core i7-3900 |
Locked | No |
Frequency | 3300 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3900 MHz (1 core), 3900 MHz (2 cores), 3800 MHz (3 cores), 3800 MHz (4 cores), 3600 MHz (5 cores), 3600 MHz (6 cores) |
Bus type | DMI 2.0 |
Bus rate | 5 GT/s |
Clock multiplier | 33 |
CPUID | 206D7 |
Microarchitecture | |
Microarchitecture | Sandy Bridge |
Platform | 6 Series Chipset |
Core Name | Sandy Bridge E |
Core Stepping | C1, C2 |
Process | 32 nm |
Transistors | 2,270,000,000 |
Technology | CMOS |
Die | 434.72 mm² 20.9 mm × 20.8 mm |
Word Size | 64 bit |
Cores | 6 |
Threads | 12 |
Max Memory | 64 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 130 W |
OP Temperature | 0 °C – 66.8 °C |
The Core i7-3960X Extreme Edition was a 64-bit high-end hexa-core microprocessor introduced by Intel in late 2011. The i7-3960X operates at 3.3 GHz with turbo mode of up to 3.9 GHz. Fabricated in 32 nm based on the Sandy Bridge microarchitecture, this chip supports up to 64 GiB (DDR3) of memory and has a Thermal Design Power of 130 W.
Cache[edit]
- Main article: Sandy Bridge § Cache
Cache Info [Edit Values] | ||
L1I$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core) |
L1D$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core) |
L2$ | 1,536 KiB 1.5 MiB 1,572,864 B 0.00146 GiB |
6x256 KiB 8-way set associative (per core) |
L3$ | 15 MiB 15,360 KiB 15,728,640 B 0.0146 GiB |
20-way set associative (shared) |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR3-1066, DDR3-1333, DDR3-1600 |
Controllers | 1 |
Channels | 4 |
ECC Support | No |
Max bandwidth | 51.2 GB/s |
Max memory | 64 GiB |
Expansions[edit]
Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- Note: VT-d support is only available on the C2 stepping version.
Die shot[edit]
- 6 cores (Note: die contains 2 fused off cores)
- 2,270,000,000 transistors
- 20.8 mm x 20.9 mm
- 434.72 mm²
See also[edit]
Facts about "Core i7-3960X Extreme Edition - Intel"
l1d$ description | 8-way set associative + |
l1i$ description | 8-way set associative + |
l2$ description | 8-way set associative + |
l3$ description | 20-way set associative + |