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Difference between revisions of "intel/atom x5/x5-z8330"
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{{intel title|Atom x5-Z8330}}
 
{{intel title|Atom x5-Z8330}}
−
{{mpu
+
{{chip
 
| name                = Intel Atom x5-Z8330
 
| name                = Intel Atom x5-Z8330
 
| no image            = Yes
 
| no image            = Yes
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| image size          =  
 
| image size          =  
 
| caption            =  
 
| caption            =  
 +
| designer            = Intel
 
| manufacturer        = Intel
 
| manufacturer        = Intel
 
| model number        = x5-Z8330
 
| model number        = x5-Z8330
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| thread count        = 4
 
| thread count        = 4
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 2 GB
+
| max memory          = 2 GiB
 
| max memory addr    =  
 
| max memory addr    =  
  
−
| electrical          = Yes
+
 
 
| power              =  
 
| power              =  
 
| sdp                = 2 W
 
| sdp                = 2 W
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== Cache ==
 
== Cache ==
 +
{{main|intel/microarchitectures/airmont#Memory_Hierarchy|l1=Airmont § Cache}}
 
{{cache info
 
{{cache info
−
|l1i cache=128 KB
+
|l1i cache=128 KiB
−
|l1i break=4x32 KB
+
|l1i break=4x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
 
|l1i extra=(per core)
 
|l1i extra=(per core)
−
|l1d cache=96 KB
+
|l1d cache=96 KiB
−
|l1d break=4x24 KB
+
|l1d break=4x24 KiB
 
|l1d desc=6-way set associative
 
|l1d desc=6-way set associative
 
|l1d extra=(per core)
 
|l1d extra=(per core)
−
|l2 cache=1 MB
+
|l2 cache=2 MiB
−
|l2 break=2x1 MB
+
|l2 break=2x1 MiB
 
|l2 desc=16-way set associative
 
|l2 desc=16-way set associative
−
|l2 extra=(per core 2 cores)
+
|l2 extra=(per 2 cores)
−
|l3 cache=0 KB
+
|l3 cache=0 KiB
 
|l3 desc=No L3$
 
|l3 desc=No L3$
 
}}
 
}}
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{{integrated memory controller
 
{{integrated memory controller
 
| type              = DDR3L-RS 1600
 
| type              = DDR3L-RS 1600
−
| type 2            = LPDDR3
+
| type 2            = LPDDR3 1600
 
| controllers        = 1
 
| controllers        = 1
 
| channels          = 1
 
| channels          = 1
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| frequency          = 200 MHz
 
| frequency          = 200 MHz
 
| max frequency      = 500 MHz
 
| max frequency      = 500 MHz
−
| max memory          = 2 GB
+
| max memory          = 2 GiB
 
| output edp          = Yes
 
| output edp          = Yes
 
| output dp          =  
 
| output dp          =  
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| output dvi          =  
 
| output dvi          =  
 
| directx ver        = 11.1
 
| directx ver        = 11.1
−
| opengl ver          = 4.3
+
| opengl ver          = 4.4
 
| opencl ver          = 1.2
 
| opencl ver          = 1.2
 
| opengl es ver      = 3.0
 
| opengl es ver      = 3.0
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== Expansions ==
 
== Expansions ==
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{{mpu expansions
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{{expansions
 
| pcie revision      = 2.0
 
| pcie revision      = 2.0
 
| pcie lanes        = 1
 
| pcie lanes        = 1
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== Features ==
 
== Features ==
−
{{mpu features
+
{{x86 features
 
| em64t    = Yes
 
| em64t    = Yes
 
| nx        = Yes
 
| nx        = Yes

Latest revision as of 15:15, 13 December 2017

Edit Values
Intel Atom x5-Z8330
General Info
DesignerIntel
ManufacturerIntel
Model Numberx5-Z8330
Part NumberFJ8066401836619
S-SpecSR2KU
MarketMobile
IntroductionFebruary 8, 2016 (announced)
February 8, 2016 (launched)
ShopAmazon
General Specs
FamilyAtom x5
SeriesZ8000
LockedYes
Frequency1440 MHz
Turbo FrequencyYes
Turbo Frequency1920 MHz (1 core)
Microarchitecture
MicroarchitectureAirmont
PlatformCherry Trail
Core NameCherry Trail
Core SteppingD1
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores4
Threads4
Max Memory2 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
SDP2 W
OP Temperature0 °C – 90 °C

The Atom x5-Z8330 is a 64-bit quad-core system on a chip introduce by Intel in early 2015. This ultra-low power SoC has a scenario design power of 2 W and operates at a base frequency of 1.44 GHz with a burst up to 1.92 GHz and supports up to 2 GB of memory. This chip incorporates the HD Graphics 400 GPU.

Cache[edit]

Main article: Airmont § Cache
Cache Info [Edit Values]
L1I$ 128 KiB
131,072 B
0.125 MiB
4x32 KiB 8-way set associative (per core)
L1D$ 96 KiB
98,304 B
0.0938 MiB
4x24 KiB 6-way set associative (per core)
L2$ 2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
2x1 MiB 16-way set associative (per 2 cores)
L3$ 0 KiB
0 MiB
0 B
0 GiB
No L3$

Memory controller[edit]

Integrated Memory Controller
Type DDR3L-RS 1600, LPDDR3 1600
Controllers 1
Channels 1
ECC Support Yes
Bandwidth (single) 12,800 MB/s
Max memory 2,048 MB

Graphics[edit]

Integrated Graphic Information
GPU HD Graphics 400
Execution Units 12
Displays 2
Frequency 200 MHz
0.2 GHz
200,000 KHz
Max frequency 500 MHz
0.5 GHz
500,000 KHz
Max memory 2 GiB
2,048 MiB
2,097,152 KiB
2,147,483,648 B
Output Embedded DisplayPort, HDMI
DirectX 11.1
OpenGL 4.4
OpenCL 1.2
OpenGL ES 3.0
DVI 1.4b
HDMI 1.4b
DVI 1.4b
Vulkan 1.0
DP 1.1a
eDP 1.3
Max HDMI Res 1920x1080 @60
Max DVI Res 1920x1080 @60 Hz
Max DSI Res 1900x1200 @60 Hz
Max DP Res 2560x1600 @60
Max eDP Res 1920x1080 @60 Hz
  • Video decode hardware acceleration including support for H.263, MPEG4, H.264, H.265 (HEVC), VP8, VP9, MVC, MPEG2, VC1, JPEG.
  • Video encode hardware acceleration including support for H.264, H.263, VP8, MVC, JPEG.
  • Four planes available per pipe - 1x Primary, 2x Video Sprite & 1x Cursor.
  • Two dedicated digital Display Serial Interface PHYs implementing MIPI-DSI support.

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes1
Configs1x1


Features[edit]

Storage[edit]

  • SD Card support (x1 SDR104)
  • SDIO support (x1 SDR104)
  • eMMC support (4.51)

Audio[edit]

  • Low Power Engine (3 I2S ports)

Package[edit]

Property Value
Type 17x17mm Type 3
IO count 378
Ball count 592
Ball pitch 0.65mm
Z-height 1.002mm
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Facts about "Atom x5-Z8330 - Intel"
RDF feed
has featureintegrated gpu +, SD Card support +, SDIO support +, eMMC support + and Low Power Engine +
integrated gpuHD Graphics 400 +
integrated gpu base frequency200 MHz (0.2 GHz, 200,000 KHz) +
integrated gpu max frequency500 MHz (0.5 GHz, 500,000 KHz) +
l1d$ description6-way set associative +
l1i$ description8-way set associative +
l2$ description16-way set associative +
l3$ descriptionNo L3$ +