Semiconductor & Computer Engineering
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Difference between revisions of "samsung/exynos/9110"
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Latest revision as of 20:44, 23 January 2026
| Edit Values | |
| Exynos 9110 | |
| General Info | |
| Designer | Samsung, ARM Holdings |
| Manufacturer | Samsung |
| Model Number | 9110 |
| Part Number | SC59110XSC |
| Market | Mobile |
| Introduction | August 9, 2018 (announced) August 9, 2018 (launched) |
| General Specs | |
| Family | Exynos |
| Series | Exynos 9 |
| Frequency | 1.15 GHz |
| Microarchitecture | |
| ISA | ARMv8.2 (ARM) |
| Microarchitecture | Cortex-A53 |
| Chipset | 9 Dual |
| Core Name | Cortex-A53 |
| Process | 10 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 2 |
| Threads | 2 |
| Max Memory | 1 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Succession | |
Exynos 9110 is a 64-bit dual-core ARM SoC for IoT devices designed by Samsung and introduced in 2018.
Serving largely as a 10LPP shrink of the company's existing Exynos 7270 SoC which was fabricated on 14LPE,
the 9110 features a dual Cortex-A53 cores operating at 1.15 GHz and incorporates an Arm Mali-T720 MP1 GPU.
Features[edit]
- Dual-core Application Processor with Modem (64 bit, 10 nm)
- GPU: ARM Mali-T720 MP1 (1-core) @ 667 MHz
- RAM: LPDDR4, LPDDR4x SDRAM; eMMC 5.1, moviNAND Flash
- Modem: CSD, GPRS, EDGE, UMTS, TD-SCDMA, TD-HSDPA,
- HSDPA, HSPA+ 21.1, HSUPA 5.8, LTE 100/50, LTE 150/50
- ARM TrustZone, ARM NEON SIMD engine; 5 MP camera support
- Video: 720p decode, qHD (854x480, 480x480) display support
- OpenCL 1.1, OpenGL ES 3.1, SiP-ePoP, for wearable devices
Utilizing devices[edit]
- Samsung Galaxy Watch WiFi (SM-R810)
- Samsung Galaxy Watch Active WiFi (SM-R500)
- Samsung Galaxy Watch Active 2 WiFi (SM-R820)
- Samsung Galaxy Watch Active 2 LTE (SM-R825U)
- Samsung Galaxy Watch Active 2 LTE (SM-R835U)
- Samsung Galaxy Watch 3 WiFi (SM-R840)
- Samsung Galaxy Watch 3 LTE (SM-R855U)
- Google Pixel Watch WiFi/LTE (Google Rohan)
Graphics[edit]
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Integrated Graphics Information
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Facts about "Exynos 9110 - Samsung"
| base frequency | 1,150 MHz (1.15 GHz, 1,150,000 kHz) + |
| chipset | 9 Dual + |
| core count | 2 + |
| core name | Cortex-A53 + |
| designer | Samsung + and ARM Holdings + |
| family | Exynos + |
| first announced | August 9, 2018 + |
| first launched | August 9, 2018 + |
| full page name | samsung/exynos/9110 + |
| instance of | microprocessor + |
| integrated gpu | Mali-T720 + |
| integrated gpu base frequency | 400 MHz (0.4 GHz, 400,000 KHz) + |
| integrated gpu designer | ARM Holdings + |
| integrated gpu execution units | 1 + |
| integrated gpu max frequency | 667 MHz (0.667 GHz, 667,000 KHz) + |
| isa | ARMv8.2 + |
| isa family | ARM + |
| ldate | August 9, 2018 + |
| manufacturer | Samsung + |
| market segment | Mobile + |
| max cpu count | 1 + |
| max memory | 1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB, 9.765625e-4 TiB) + |
| microarchitecture | Cortex-A53 + |
| model number | 9110 + |
| name | Exynos 9110 + |
| part number | SC59110XSC + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |
| series | Exynos 9 + |
| smp max ways | 1 + |
| technology | CMOS + |
| thread count | 2 + |
| used by | Samsung Galaxy Watch WiFi (SM-R810) +, Samsung Galaxy Watch Active WiFi (SM-R500) +, Samsung Galaxy Watch Active 2 WiFi (SM-R820) +, Samsung Galaxy Watch Active 2 LTE (SM-R825U) +, Samsung Galaxy Watch Active 2 LTE (SM-R835U) +, Samsung Galaxy Watch 3 WiFi (SM-R840) +, Samsung Galaxy Watch 3 LTE (SM-R855U) + and Google Pixel Watch WiFi/LTE + |
| word size | 64 bit (8 octets, 16 nibbles) + |