Semiconductor & Computer Engineering
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Difference between revisions of "x86"
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| − | ! 8 | + | ! Quad word (8 bytes) !! Double word (4 bytes) !! Word (2 bytes) !! Byte 1 !! Byte 0 |
|- | |- | ||
| − | | %rax || %eax || %ax || %al | + | | %rax || %eax || %ax || %ah || %al |
|- | |- | ||
| − | | %rcx || %ecx || %cx || %cl | + | | %rcx || %ecx || %cx || %ch || %cl |
|- | |- | ||
| − | | %rdx || %edx || %dx || %dl | + | | %rdx || %edx || %dx || %dh || %dl |
|- | |- | ||
| − | | %rbx || %ebx || %bx || %bl | + | | %rbx || %ebx || %bx || %bh || %bl |
|- | |- | ||
| − | | %rsi || %esi || %si || %sil | + | | %rsi || %esi || %si || || %sil |
|- | |- | ||
| − | | %rdi || %edi || %di || %dil | + | | %rdi || %edi || %di || || %dil |
|- | |- | ||
| − | | %rsp || %esp || %sp || %spl | + | | %rsp || %esp || %sp || || %spl |
|- | |- | ||
| − | | %rbp || %ebp || %bp || %bpl | + | | %rbp || %ebp || %bp || || %bpl |
|- | |- | ||
| − | | %r8 || %r8d || %r8w || %r8b | + | | %r8 || %r8d || %r8w || || %r8b |
|- | |- | ||
| − | | %r9 || %r9d || %r9w || %r9b | + | | %r9 || %r9d || %r9w || || %r9b |
|- | |- | ||
| − | | %r10 || %r10d || %r10w || %r10b | + | | %r10 || %r10d || %r10w || || %r10b |
|- | |- | ||
| − | | %r11 || %r11d || %r11w || %r11b | + | | %r11 || %r11d || %r11w || || %r11b |
|- | |- | ||
| − | | %r12 || %r12d || %r12w || %r12b | + | | %r12 || %r12d || %r12w || || %r12b |
|- | |- | ||
| − | | %r13 || %r13d || %r13w || %r13b | + | | %r13 || %r13d || %r13w || || %r13b |
|- | |- | ||
| − | | %r14 || %r14d || %r14w || %r14b | + | | %r14 || %r14d || %r14w || || %r14b |
|- | |- | ||
| − | | %r15 || %r15d || %r15w || %r15b | + | | %r15 || %r15d || %r15w || || %r15b |
|} | |} | ||
=== Operation Modes === | === Operation Modes === | ||
Latest revision as of 10:29, 10 July 2021
x86
Instruction Set Architecture
Instruction Set Architecture
General
Variants
Topics
- Instructions
- Addressing Modes
- Registers
- Model-Specific Register
- Assembly
- Interrupts
- Micro-Ops
- Timer
- Calling Convention
- Microarchitectures
- CPUID
CPUIDs
Modes
Extensions(all)
x86 is a family of little-endian variable-length instruction set architectures and extensions. As its namesake indicates, the x86 ISA offers binary compatibility all the way from the original 8086 to modern microarchitectures as well as source code compatibility since the 8080. The x86 architecture is widely used in the desktop and server markets. Today, custom x86-based implementations are designed by a number of companies including Intel, AMD, VIA, Zhaoxin, DM&P, and RDC.
Generally speaking, the term 'x86' is most often used as an umbrella term encompassing the original x86-16, x86-32 (IA-32), x86-64 (AMD64), and the various extensions such as MMX, 3DNOW!, and SSE.
Contents
History[edit]
- Main article: History of x86
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This section is empty; you can help add the missing info by editing this page. |
Overview[edit]
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Registers[edit]
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| Quad word (8 bytes) | Double word (4 bytes) | Word (2 bytes) | Byte 1 | Byte 0 |
|---|---|---|---|---|
| %rax | %eax | %ax | %ah | %al |
| %rcx | %ecx | %cx | %ch | %cl |
| %rdx | %edx | %dx | %dh | %dl |
| %rbx | %ebx | %bx | %bh | %bl |
| %rsi | %esi | %si | %sil | |
| %rdi | %edi | %di | %dil | |
| %rsp | %esp | %sp | %spl | |
| %rbp | %ebp | %bp | %bpl | |
| %r8 | %r8d | %r8w | %r8b | |
| %r9 | %r9d | %r9w | %r9b | |
| %r10 | %r10d | %r10w | %r10b | |
| %r11 | %r11d | %r11w | %r11b | |
| %r12 | %r12d | %r12w | %r12b | |
| %r13 | %r13d | %r13w | %r13b | |
| %r14 | %r14d | %r14w | %r14b | |
| %r15 | %r15d | %r15w | %r15b |
Operation Modes[edit]
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Instruction Set[edit]
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Syntaxes[edit]
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Interrupts[edit]
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This section is empty; you can help add the missing info by editing this page. |
Extensions[edit]
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This section is empty; you can help add the missing info by editing this page. |
Implementations[edit]
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See also[edit]
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This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |
1 octets
2 nibbles
2 nibbles
2 octets
4 nibbles
4 nibbles
4 octets
8 nibbles
8 nibbles
8 octets
16 nibbles
16 nibbles
Facts about "x86"
| design | Von Neumann + |
| designer | Intel + and AMD + |
| dev model | Proprietary + |
| endianness | Little-endian + |
| first launched | 1978 + |
| format | Register-Memory + |
| full page name | x86 + |
| name | x86 + |
| word size | 8 bit (1 octets, 2 nibbles) +, 16 bit (2 octets, 4 nibbles) +, 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |