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Architectures
Popular x86
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Intel
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From WikiChip
Difference between revisions of "Template:x86 isa main"
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Line 33: | Line 33: | ||
* {{x86|ADX}} | * {{x86|ADX}} | ||
* {{x86|AES}} | * {{x86|AES}} | ||
+ | * {{x86|AMX}} | ||
* {{x86|AVX}} | * {{x86|AVX}} | ||
* {{x86|AVX2}} | * {{x86|AVX2}} | ||
Line 48: | Line 49: | ||
* {{x86|MMX}} | * {{x86|MMX}} | ||
* {{x86|MPX}} | * {{x86|MPX}} | ||
− | * {{x86|PMEM}} | + | * {{x86|persistent memory extensions|PMEM}} |
* {{x86|PREFETCH}} | * {{x86|PREFETCH}} | ||
* {{x86|RdRAND}} | * {{x86|RdRAND}} |
Latest revision as of 22:37, 28 June 2020
x86
Instruction Set Architecture
Instruction Set Architecture
General
Variants
Topics
- Instructions
- Addressing Modes
- Registers
- Model-Specific Register
- Assembly
- Interrupts
- Micro-Ops
- Timer
- Calling Convention
- Microarchitectures
- CPUID
CPUIDs
Modes
Extensions(all)