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Difference between revisions of "intel/microarchitectures/gracemont"
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|introduction=2021 | |introduction=2021 | ||
|process=10 nm | |process=10 nm | ||
+ | |type=Superscalar | ||
+ | |oooe=Yes | ||
+ | |speculative=Yes | ||
+ | |renaming=Yes | ||
|isa=x86-64 | |isa=x86-64 | ||
+ | |extension=MOVBE | ||
+ | |extension 2=MMX | ||
+ | |extension 3=SSE | ||
+ | |extension 4=SSE2 | ||
+ | |extension 5=SSE3 | ||
+ | |extension 6=SSSE3 | ||
+ | |extension 7=SSE4.1 | ||
+ | |extension 8=SSE4.2 | ||
+ | |extension 9=POPCNT | ||
+ | |extension 10=AES | ||
+ | |extension 11=PCLMUL | ||
+ | |extension 12=RDRND | ||
+ | |extension 13=XSAVE | ||
+ | |extension 14=XSAVEOPT | ||
+ | |extension 15=FSGSBASE | ||
+ | |extension 16=PTWRITE | ||
+ | |extension 17=RDPID | ||
+ | |extension 18=SGX | ||
+ | |extension 19=UMIP | ||
+ | |extension 20=GFNI-SSE | ||
+ | |extension 21=CLWB | ||
+ | |extension 22=ENCLV | ||
+ | |extension 23=SHA | ||
+ | |core name= | ||
+ | |core name 2= | ||
+ | |core name 3= | ||
|predecessor=Tremont | |predecessor=Tremont | ||
|predecessor link=intel/microarchitectures/tremont | |predecessor link=intel/microarchitectures/tremont |
Revision as of 01:44, 11 February 2020
Edit Values | |
Gracemont µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | 2021 |
Process | 10 nm |
Pipeline | |
Type | Superscalar |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Instructions | |
ISA | x86-64 |
Extensions | MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, UMIP, GFNI-SSE, CLWB, ENCLV, SHA |
Succession | |
Gracemont is Intel's successor to Tremont, a 10 nm microarchitecture for ultra-low power devices and microservers.
Process Technology
Gracemont is designed to take advantage of Intel's 10 nm process.
Architecture
Key changes from Tremont
Facts about "Gracemont - Microarchitectures - Intel"
codename | Gracemont + |
designer | Intel + |
first launched | 2021 + |
full page name | intel/microarchitectures/gracemont + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Gracemont + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |