Latest revision as of 05:55, 26 June 2019

Edit Values
Helio P30
General Info
Designer	MediaTek, ARM Holdings
Manufacturer	TSMC
Model Number	P30
Market	Mobile
Introduction	August 28, 2017 (announced) Aug 28, 2017 (launched)
General Specs
Family	Helio
Series	Helio P
Frequency	1,650 MHz, 2,300 MHz
Microarchitecture
ISA	ARMv8 (ARM)
Microarchitecture	Cortex-A53
Core Name	Cortex-A53
Process	16 nm
Technology	CMOS
Word Size	64 bit
Cores	8
Threads	8
Max Memory	6 GiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)

Helio P30 is a mid-range performance 64-bit octa-core ARM LTE system on a chip designed by MediaTek set to launch in late 2017. This SoC, which is fabricated on TSMC's 16 nm process, incorporates eight Cortex-A53 cores with four little cores operating at up to 1.65 GHz and four big cores operating at up to 2.3 GHz. The Helio P30 supports up to 6 GiB of dual-channel LPDDR4X-3200 memory and incorporates a modem supporting LTE User Equipment (UE) category 7 (DL)/13 (UL).

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache[edit]

Main article: Cortex-A53 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

This section is empty; you can help add the missing info by editing this page.

Memory controller[edit]

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type LPDDR4X-3200 Supports ECC No Max Mem 6 GiB Controllers 1 Channels 2 Width 16 bit Max Bandwidth 11.92 GiB/s 12,206.08 MiB/s 12.799 GB/s 12,799.003 MB/s 0.0116 TiB/s 0.0128 TB/s Bandwidth Single 5.96 GiB/s Double 11.92 GiB/s

Graphics[edit]

[Edit/Modify IGP Info]

	Integrated Graphics Information
	GPU Mali-G71 Designer ARM Holdings Execution Units 2 Frequency 950 MHz 0.95 GHz 950,000 KHz Output DSI Max Resolution DSI 2160x1080 Standards Direct3D 12 OpenGL 3.2 OpenCL 2.0 OpenGL ES 3.2 OpenVG 1.1 Vulkan 1.0

Wireless[edit]

Wireless Communications
Cellular
4G	LTE Advanced E-UTRAN Yes UE Cat 7 (DL), 13 (UL)

Camera[edit]

• 25MP (single), 16MP+16MP (dual)
  • 3840 x 2160 max recording resolution @ 30 FPS
  • color+mono, wide+tele zoom with real-time depth engine

Utilizing devices[edit]

This list is incomplete; you can help by expanding it.