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Difference between revisions of "mediatek/helio/p30"
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{{mediatek title|Helio P30}}
 
{{mediatek title|Helio P30}}
−
{{mpu
+
{{chip
−
|future=Yes
 
 
|name=Helio P30
 
|name=Helio P30
−
|no image=No
+
|image=helio p30.png
 
|designer=MediaTek
 
|designer=MediaTek
 
|designer 2=ARM Holdings
 
|designer 2=ARM Holdings
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|market=Mobile
 
|market=Mobile
 
|first announced=August 28, 2017
 
|first announced=August 28, 2017
 +
|first launched=Aug 28, 2017
 
|family=Helio
 
|family=Helio
 
|series=Helio P
 
|series=Helio P
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{{unknown features}}
 
{{unknown features}}
 +
 +
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== Cache ==
 +
{{main|arm holdings/microarchitectures/cortex-a53#Memory_Hierarchy|l1=Cortex-A53 § Cache}}
 +
{{cache size}}
 +
{{empty section}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=LPDDR4X-3200
 +
|ecc=No
 +
|max mem=6 GiB
 +
|controllers=1
 +
|channels=2
 +
|width=16 bit
 +
|max bandwidth=11.92 GiB/s
 +
|bandwidth schan=5.96 GiB/s
 +
|bandwidth dchan=11.92 GiB/s
 +
}}
 +
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = Mali-G71
 +
| device id          =
 +
| designer            = ARM Holdings
 +
| execution units    = 2
 +
| frequency          = 950 MHz
 +
 +
| output dsi          = Yes
 +
 +
| max res dsi        = 2160x1080
 +
 +
| direct3d ver        = 12
 +
| opencl ver          = 2.0
 +
| opengl ver          = 3.2
 +
| opengl es ver      = 3.2
 +
| vulkan ver          = 1.0
 +
| openvg ver          = 1.1
 +
}}
 +
 +
{| class="wikitable"
 +
! colspan="3" | Hardware Accelerated Video Capabilities
 +
|-
 +
! Codec !! Encode !! Decode
 +
|-
 +
| [[MPEG-4 AVC]] (H.264) || {{tchk|yes|@ 30 FPS}} || {{tchk|yes|@ 30 FPS}}
 +
|-
 +
| [[HEVC]] (H.265) || {{tchk|no}} || {{tchk|yes|@ 30 FPS}}
 +
|-
 +
| [[VP9]] || {{tchk|yes|@ 30 FPS}} || {{tchk|yes|@ 30 FPS}}
 +
|}
 +
 +
== Wireless ==
 +
{{wireless links
 +
| 4g                = Yes
 +
| lte a            = Yes
 +
| e-utran          = Yes
 +
| ue cat            = 7 (DL), 13 (UL)
 +
}}
 +
 +
== Camera ==
 +
* 25MP (single), 16MP+16MP (dual)
 +
** 3840 x 2160 max recording resolution @ 30 FPS
 +
** color+mono, wide+tele zoom with real-time depth engine
 +
 +
== Utilizing devices ==
 +
<!--
 +
* [[used by::XXXXXXXXXXX]]
 +
-->
 +
 +
{{expand list}}

Latest revision as of 05:55, 26 June 2019

Edit Values
Helio P30
helio p30.png
General Info
DesignerMediaTek,
ARM Holdings
ManufacturerTSMC
Model NumberP30
MarketMobile
IntroductionAugust 28, 2017 (announced)
Aug 28, 2017 (launched)
General Specs
FamilyHelio
SeriesHelio P
Frequency1,650 MHz, 2,300 MHz
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureCortex-A53
Core NameCortex-A53
Process16 nm
TechnologyCMOS
Word Size64 bit
Cores8
Threads8
Max Memory6 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)

Helio P30 is a mid-range performance 64-bit octa-core ARM LTE system on a chip designed by MediaTek set to launch in late 2017. This SoC, which is fabricated on TSMC's 16 nm process, incorporates eight Cortex-A53 cores with four little cores operating at up to 1.65 GHz and four big cores operating at up to 2.3 GHz. The Helio P30 supports up to 6 GiB of dual-channel LPDDR4X-3200 memory and incorporates a modem supporting LTE User Equipment (UE) category 7 (DL)/13 (UL).


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache[edit]

Main article: Cortex-A53 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
New text document.svg This section is empty; you can help add the missing info by editing this page.

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR4X-3200
Supports ECCNo
Max Mem6 GiB
Controllers1
Channels2
Width16 bit
Max Bandwidth11.92 GiB/s
12,206.08 MiB/s
12.799 GB/s
12,799.003 MB/s
0.0116 TiB/s
0.0128 TB/s
Bandwidth
Single 5.96 GiB/s
Double 11.92 GiB/s

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-G71
DesignerARM Holdings
Execution Units2
Frequency950 MHz
0.95 GHz
950,000 KHz
OutputDSI
Max Resolution
DSI2160x1080
Standards
Direct3D12
OpenGL3.2
OpenCL2.0
OpenGL ES3.2
OpenVG1.1
Vulkan1.0
Hardware Accelerated Video Capabilities
Codec Encode Decode
MPEG-4 AVC (H.264) @ 30 FPS @ 30 FPS
HEVC (H.265) ✘ @ 30 FPS
VP9 @ 30 FPS @ 30 FPS

Wireless[edit]

Antu network-wireless-connected-100.svgWireless Communications
Cellular
4G
LTE Advanced
E-UTRANYes
UE Cat7 (DL), 13 (UL)

Camera[edit]

  • 25MP (single), 16MP+16MP (dual)
    • 3840 x 2160 max recording resolution @ 30 FPS
    • color+mono, wide+tele zoom with real-time depth engine

Utilizing devices[edit]

This list is incomplete; you can help by expanding it.

Retrieved from "https://en.wikichip.org/w/index.php?title=mediatek/helio/p30&oldid=92144"
Facts about "Helio P30 - MediaTek"
RDF feed
base frequency1,650 MHz (1.65 GHz, 1,650,000 kHz) + and 2,300 MHz (2.3 GHz, 2,300,000 kHz) +
core count8 +
core nameCortex-A53 +
designerMediaTek + and ARM Holdings +
familyHelio +
first announcedAugust 28, 2017 +
first launchedAugust 28, 2017 +
full page namemediatek/helio/p30 +
has 4g supporttrue +
has e-utran supporttrue +
has ecc memory supportfalse +
has lte advanced supporttrue +
instance ofmicroprocessor +
integrated gpuMali-G71 +
integrated gpu base frequency950 MHz (0.95 GHz, 950,000 KHz) +
integrated gpu designerARM Holdings +
integrated gpu execution units2 +
isaARMv8 +
isa familyARM +
ldateAugust 28, 2017 +
main imageFile:helio p30.png +
manufacturerTSMC +
market segmentMobile +
max cpu count1 +
max memory6,144 MiB (6,291,456 KiB, 6,442,450,944 B, 6 GiB, 0.00586 TiB) +
max memory bandwidth11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels2 +
microarchitectureCortex-A53 +
model numberP30 +
nameHelio P30 +
process16 nm (0.016 μm, 1.6e-5 mm) +
seriesHelio P +
smp max ways1 +
supported memory typeLPDDR4X-3200 +
technologyCMOS +
thread count8 +
user equipment category7 (DL), 13 (UL) +
word size64 bit (8 octets, 16 nibbles) +