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'''Comet Lake''' ('''CML''') is a planned [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Coffee Lake}} and {{\\|Whiskey Lake}} for desktops, high-performance mobile devices, and ultra-low power mobile devices.
 
'''Comet Lake''' ('''CML''') is a planned [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Coffee Lake}} and {{\\|Whiskey Lake}} for desktops, high-performance mobile devices, and ultra-low power mobile devices.

Revision as of 13:34, 4 June 2019

Edit Values
Comet Lake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Process14 nm
Core Configs4
Pipeline
TypeSuperscalar, Superpipeline
OoOEYes
SpeculativeYes
Reg RenamingYes
Stages14-19
Decode5-way
Instructions
ISAx86-64
ExtensionsMOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA3, F16C, BMI, BMI2, VT-x, VT-d, TXT, TSX, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVE, SGX, MPX
Cache
L1I Cache32 KiB/core
8-way set associative
L1D Cache32 KiB/core
8-way set associative
L2 Cache256 KiB/core
4-way set associative
L3 Cache2 MiB/core
Up to 16-way set associative
L4 Cache128 MiB/package
on Iris Pro GPUs only
Cores
Core NamesComet Lake U,
Comet Lake S
Succession

Comet Lake (CML) is a planned microarchitecture designed by Intel as a successor to Coffee Lake and Whiskey Lake for desktops, high-performance mobile devices, and ultra-low power mobile devices.


Codenames

Core Abbrev Description Graphics Target
Comet Lake S CML-S Mainstream performance GT2 Desktop performance to value, AiOs, and minis
Comet Lake U CML-U Ultra-low power GT2 Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room

Brands

Intel is expected to release Comet Lake under 3 main brand families:

Logo Family General Description Differentiating Features
Cores HT AVX AVX2 TBT ECC
core i3 logo (2015).png Core i3 Low-end Performance
core i5 logo (2015).png Core i5 Mid-range Performance
core i7 logo (2015).png Core i7 High-end Performance

Release Dates

Comet Lake is expected to be released in mid-2019.

Compatibility

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Compiler support

Compiler Arch-Specific Arch-Favorable
ICC -march=skylake -mtune=skylake
GCC -march=skylake -mtune=skylake
LLVM -march=skylake -mtune=skylake
Visual Studio /arch:AVX2 /tune:skylake

CPUID

New text document.svg This section is empty; you can help add the missing info by editing this page.

Architecture

Key changes from Coffee Lake

New text document.svg This section is empty; you can help add the missing info by editing this page.

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/comet_lake&oldid=91881"
Facts about "Comet Lake - Microarchitectures - Intel"
RDF feed
codenameComet Lake +
core count4 +
designerIntel +
full page nameintel/microarchitectures/comet lake +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameComet Lake +
pipeline stages (max)19 +
pipeline stages (min)14 +
process14 nm (0.014 μm, 1.4e-5 mm) +