From WikiChip
Difference between revisions of "intel/xeon d/d-1523n"
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|l2 policy=write-back | |l2 policy=write-back | ||
|l3 cache=6 MiB | |l3 cache=6 MiB | ||
− | |l3 break= | + | |l3 break=4x1.5 MiB |
|l3 desc=16-way set associative | |l3 desc=16-way set associative | ||
|l3 policy=write-back | |l3 policy=write-back | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This SoC has no integrated graphics processing unit. | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR4-1866 | ||
+ | |ecc=Yes | ||
+ | |max mem=128 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=27.81 GiB/s | ||
+ | |bandwidth schan=13.9 GiB/s | ||
+ | |bandwidth dchan=27.81 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=24 | ||
+ | |pcie config=x16 | ||
+ | |pcie config 2=x8 | ||
+ | |pcie config 3=x4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=2.0 | ||
+ | |pcie lanes=8 | ||
+ | |pcie config=x8 | ||
+ | |pcie config 2=x4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=USB | ||
+ | |usb revision=3.0 | ||
+ | |usb ports=4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=USB | ||
+ | |usb revision=2.0 | ||
+ | |usb ports=4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=SATA | ||
+ | |sata revision=3 | ||
+ | |sata ports=6 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Networking == | ||
+ | {{network | ||
+ | |eth opts=Yes | ||
+ | |10ge=Yes | ||
+ | |10ge ports=2 | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx512vnni=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |bfloat16=No | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |intqat=Yes | ||
+ | |dlboost=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
+ | |em64t=Yes | ||
+ | |vt-x=Yes | ||
+ | |vt-d=Yes | ||
+ | |sse4=Yes | ||
+ | |sse4_1=Yes | ||
+ | |sse4_2=Yes | ||
+ | |bmi=Yes | ||
+ | |secure key=Yes | ||
+ | |os guard=Yes | ||
}} | }} |
Latest revision as of 01:22, 1 April 2019
Edit Values | |
Xeon D-1523N | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | D-1523N |
Part Number | GG8068203255105 |
S-Spec | SR3KU |
Market | Server, Embedded |
Introduction | July, 2017 (announced) July, 2017 (launched) |
Release Price | $256.00 (tray) |
Shop | Amazon |
General Specs | |
Family | Xeon D |
Series | D-1500 |
Locked | Yes |
Frequency | 2,000 MHz |
Turbo Frequency | 2,600 MHz (1 core) |
Bus type | DMI 2.0 |
Clock multiplier | 20 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Platform | Grangeville |
Core Name | Broadwell DE |
Core Family | 6 |
Core Model | 6 |
Core Stepping | A1 |
Process | 14 nm |
Transistors | 3,200,000,000 |
Technology | CMOS |
Die | 246.24 mm² |
Word Size | 64 bit |
Cores | 4 |
Threads | 8 |
Max Memory | 128 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 45 W |
Packaging | |
Package | FCBGA-1667 (FCBGA) |
Dimension | 37.5 mm × 37.5 mm × 3.557 mm |
Pitch | 0.7 mm |
Contacts | 1667 |
Xeon D-1523N is a 64-bit quad-core x86 microserver SoC introduced by Intel in late 2017. The D-1523N is based on the Broadwell microarchitecture and is fabricated on their 14 nm process. It operates at 2.0 GHz with a TDP of 45 W and a turbo frequency of 2.6 GHz. This processor supports up to 128 GiB of dual-channel DDR4-1866 memory.
Cache[edit]
- Main article: Broadwell § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics[edit]
This SoC has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Networking[edit]
Networking
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Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon D-1523N - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-1523N - Intel#pcie + |
back image | + |
base frequency | 2,000 MHz (2 GHz, 2,000,000 kHz) + |
bus type | DMI 2.0 + |
clock multiplier | 20 + |
core count | 4 + |
core family | 6 + |
core model | 6 + |
core name | Broadwell DE + |
core stepping | A1 + |
designer | Intel + |
die area | 246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) + |
family | Xeon D + |
first announced | July 2017 + |
first launched | July 2017 + |
full page name | intel/xeon d/d-1523n + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Secure Key Technology +, OS Guard + and Integrated QuickAssist Technology + |
has integrated intel quickassist technology | true + |
has intel enhanced speedstep technology | true + |
has intel secure key technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |
ldate | July 2017 + |
main image | + |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
max memory bandwidth | 27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
max memory channels | 2 + |
max sata ports | 6 + |
max usb ports | 4 + |
microarchitecture | Broadwell + |
model number | D-1523N + |
name | Xeon D-1523N + |
package | FCBGA-1667 + |
part number | GG8068203255105 + |
platform | Grangeville + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 256.00 (€ 230.40, £ 207.36, ¥ 26,452.48) + |
release price (tray) | $ 256.00 (€ 230.40, £ 207.36, ¥ 26,452.48) + |
s-spec | SR3KU + |
series | D-1500 + |
smp max ways | 1 + |
supported memory type | DDR4-1866 + |
tdp | 45 W (45,000 mW, 0.0603 hp, 0.045 kW) + |
technology | CMOS + |
thread count | 8 + |
transistor count | 3,200,000,000 + |
turbo frequency (1 core) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |