Difference between revisions of "intel/xeon d/d-1553n"

	Edit Values
	Xeon D-1553N
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	D-1553N
Part Number	GG8068203255104
S-Spec	SR3KT
Market	Server, Embedded
Introduction	July, 2017 (announced); July, 2017 (launched)
Release Price	$855.00 (tray)
Shop	Amazon
	General Specs
Family	Xeon D
Series	D-1500
Locked	Yes
Frequency	2,300 MHz
Turbo Frequency	2,700 MHz (1 core)
Bus type	DMI 2.0
Clock multiplier	23
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Broadwell
Platform	Grangeville
Core Name	Broadwell DE
Core Family	6
Core Model	6
Core Stepping	A1
Process	14 nm
Transistors	3,200,000,000
Technology	CMOS
Die	246.24 mm²
Word Size	64 bit
Cores	8
Threads	16
Max Memory	128 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
TDP	65 W
	Packaging
Package	FCBGA-1667 (FCBGA)
Dimension	37.5 mm × 37.5 mm × 3.557 mm
Pitch	0.7 mm
Contacts	1667

Revision as of 02:00, 1 April 2019

Xeon D-1553N is a 64-bit octa-core x86 microserver SoC introduced by Intel in late 2017. The D-1553N is based on the Broadwell microarchitecture and is fabricated on their 14 nm process. It operates at 2.3 GHz with a TDP of 65 W and a turbo frequency of 2.7 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2400 memory.

Cache

Main article: Broadwell § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

512 KiB

524,288 B
0.5 MiB

L1I$	256 KiB 262,144 B 0.25 MiB	8x32 KiB	8-way set associative
L1D$	256 KiB 262,144 B 0.25 MiB	8x32 KiB	8-way set associative	write-back

L2$

2 MiB

2,048 KiB
2,097,152 B
0.00195 GiB

		8x256 KiB	8-way set associative	write-back

L3$

12 MiB

12,288 KiB
12,582,912 B
0.0117 GiB

		8x1.5 MiB	16-way set associative	write-back

Memory controller

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2400
Supports ECC	Yes
Max Mem	128 GiB
Controllers	1
Channels	2
Max Bandwidth	35.76 GiB/s 36,618.24 MiB/s 38.397 GB/s 38,397.008 MB/s 0.0349 TiB/s 0.0384 TB/s
Bandwidth	Single 17.88 GiB/s Double 35.76 GiB/s

Networking

[Edit/Modify Network Info]

Networking

Ethernet

10GbE	Yes (Ports: 4)

@@ Line 75: / Line 75: @@
 |bandwidth schan=17.88 GiB/s
 |bandwidth dchan=35.76 GiB/s
+}}
+== Networking ==
+{{network
+|eth opts=Yes
+|10ge=Yes
+|10ge ports=4
 }}

back image	+
base frequency	2,300 MHz (2.3 GHz, 2,300,000 kHz) +
bus type	DMI 2.0 +
clock multiplier	23 +
core count	8 +
core family	6 +
core model	6 +
core name	Broadwell DE +
core stepping	A1 +
designer	Intel +
die area	246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) +
family	Xeon D +
first announced	July 2017 +
first launched	July 2017 +
full page name	intel/xeon d/d-1553n +
has ecc memory support	true +
has locked clock multiplier	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	512 KiB (524,288 B, 0.5 MiB) +
l1d$ description	8-way set associative +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) +
l1i$ description	8-way set associative +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) +
l2$ description	8-way set associative +
l2$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description	16-way set associative +
l3$ size	12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +
ldate	July 2017 +
main image	+
manufacturer	Intel +
market segment	Server + and Embedded +
max cpu count	1 +
max memory	131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth	35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels	2 +
microarchitecture	Broadwell +
model number	D-1553N +
name	Xeon D-1553N +
package	FCBGA-1667 +
part number	GG8068203255104 +
platform	Grangeville +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 855.00 (€ 769.50, £ 692.55, ¥ 88,347.15) +
release price (tray)	$ 855.00 (€ 769.50, £ 692.55, ¥ 88,347.15) +
s-spec	SR3KT +
series	D-1500 +
smp max ways	1 +
supported memory type	DDR4-2400 +
tdp	65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
technology	CMOS +
thread count	16 +
transistor count	3,200,000,000 +
turbo frequency (1 core)	2,700 MHz (2.7 GHz, 2,700,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

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Revision as of 02:00, 1 April 2019

Cache

Memory controller

Networking