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Difference between revisions of "cavium/microarchitectures/thunderx1"
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− | The microarchitecture of the original custom-designed [[Cavium]] [[ThunderX]] processor might be called ThunderX1 for the purposes of this wiki. | + | The microarchitecture of the original custom-designed [[Cavium]] [[cavium/thunderx|ThunderX]] processor might be called ThunderX1 for the purposes of this wiki. This microarchitecture is also the basis for the [[cavium/octeon_tx|Octeon TX]] family of processors. |
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[https://www.anandtech.com/print/10353/investigating-cavium-thunderx-48-arm-cores] | [https://www.anandtech.com/print/10353/investigating-cavium-thunderx-48-arm-cores] | ||
[https://www.nextplatform.com/2015/12/09/arm-servers-cavium-is-a-contender-with-thunderx/] | [https://www.nextplatform.com/2015/12/09/arm-servers-cavium-is-a-contender-with-thunderx/] |
Latest revision as of 18:30, 1 February 2019
Edit Values | |
ThunderX1 µarch | |
General Info | |
Arch Type | CPU |
Designer | Cavium |
Manufacturer | GlobalFoundries |
Introduction | 2014 |
Process | 28 nm |
Core Configs | 24, 48 |
Pipeline | |
Type | Superscalar, Superpipeline |
Decode | 4? |
Instructions | |
ISA | ARMv8.1 |
Extensions | NEON, TrustZone |
Cache | |
L1I Cache | 78 KiB/core 39-way set associative |
L1D Cache | 32 KiB/core 32-way set associative |
L2 Cache | 16 MiB/socket 16-way set associative |
Succession | |
The microarchitecture of the original custom-designed Cavium ThunderX processor might be called ThunderX1 for the purposes of this wiki. This microarchitecture is also the basis for the Octeon TX family of processors.
Facts about "ThunderX1 - Microarchitectures - Cavium"
codename | ThunderX1 + |
core count | 24 + and 48 + |
designer | Cavium + |
first launched | 2014 + |
full page name | cavium/microarchitectures/thunderx1 + |
instance of | microarchitecture + |
instruction set architecture | ARMv8.1 + |
manufacturer | GlobalFoundries + |
microarchitecture type | CPU + |
name | ThunderX1 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |