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Difference between revisions of "ampere computing/microarchitectures/quicksilver"
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| + | {{ampere title|Quicksilver|arch}} | ||
| + | {{microarchitecture | ||
| + | |atype=CPU | ||
| + | |name=Quicksilver | ||
| + | |designer=Ampere Computing | ||
| + | |manufacturer=TSMC | ||
| + | |introduction=2019 | ||
| + | |process=7 nm | ||
| + | |type=Superscalar | ||
| + | |oooe=Yes | ||
| + | |speculative=Yes | ||
| + | |renaming=Yes | ||
| + | |isa=ARMv8.2 | ||
| + | |predecessor=Skylark | ||
| + | |predecessor link=apm/microarchitectures/skylark | ||
| + | }} | ||
| + | '''Quicksilver''' is [[ampere computing|Ampere]]'s successor to {{apm|Skylark|l=arch}}, a planned [[7 nm]] [[ARM]] microarchitecture for servers. | ||
| + | == Release Dates == | ||
| + | [[File:ampere quicksilver roadmap.png|right|400px]] | ||
| + | Quicksilver is planned to be launched sometimes in 2019. | ||
| + | |||
| + | == Technology == | ||
| + | Quicksilver will be fabricated on [[TSMC]]'s [[7 nm process]]. | ||
| + | |||
| + | == Architecture == | ||
| + | === Key changes from {{apm|Skylark|l=arch}} === | ||
| + | * [[7 nm process]] (from [[16 nm]]) | ||
| + | * Higher [[IPC]] | ||
| + | * Higher core count (from [[32-core]]) | ||
| + | * ARMv8.2 support (from ARMv8) | ||
| + | * Multi-socket support | ||
| + | * Faster memory (3200 MT/s from 2666 MT/s) | ||
| + | * PCIe 4.0 support (from 3.0) | ||
| + | * [[CCIX]] connectivity support | ||
Revision as of 15:01, 25 October 2018
| Edit Values | |
| Quicksilver µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Ampere Computing |
| Manufacturer | TSMC |
| Introduction | 2019 |
| Process | 7 nm |
| Pipeline | |
| Type | Superscalar |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Instructions | |
| ISA | ARMv8.2 |
| Succession | |
Quicksilver is Ampere's successor to Skylark, a planned 7 nm ARM microarchitecture for servers.
Release Dates
Quicksilver is planned to be launched sometimes in 2019.
Technology
Quicksilver will be fabricated on TSMC's 7 nm process.
Architecture
Key changes from Skylark
- 7 nm process (from 16 nm)
- Higher IPC
- Higher core count (from 32-core)
- ARMv8.2 support (from ARMv8)
- Multi-socket support
- Faster memory (3200 MT/s from 2666 MT/s)
- PCIe 4.0 support (from 3.0)
- CCIX connectivity support
Facts about "Quicksilver - Microarchitectures - Ampere"
| codename | Quicksilver + |
| designer | Ampere Computing + |
| first launched | 2019 + |
| full page name | ampere computing/microarchitectures/quicksilver + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8.2 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Quicksilver + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |