From WikiChip
Difference between revisions of "ampere computing/microarchitectures/quicksilver"
< ampere computing

(Blanked the page)
Line 1: Line 1:
{{ampere title|Quicksilver|arch}}
 
{{microarchitecture
 
|atype=CPU
 
|name=Quicksilver
 
|designer=Ampere Computing
 
|manufacturer=TSMC
 
|introduction=2019
 
|process=7 nm
 
|type=Superscalar
 
|oooe=Yes
 
|speculative=Yes
 
|renaming=Yes
 
|isa=ARMv8.2
 
|predecessor=Skylark
 
|predecessor link=apm/microarchitectures/skylark
 
}}
 
'''Quicksilver''' is [[ampere computing|Ampere]]'s successor to {{apm|Skylark|l=arch}}, a planned [[7 nm]] [[ARM]] microarchitecture for servers.
 
  
== Release Dates ==
 
[[File:ampere quicksilver roadmap.png|right|400px]]
 
Quicksilver is planned to be launched sometimes in 2019.
 
 
== Technology ==
 
Quicksilver will be fabricated on [[TSMC]]'s [[7 nm process]].
 
 
== Architecture ==
 
=== Key changes from {{apm|Skylark|l=arch}} ===
 
* [[7 nm process]] (from [[16 nm]])
 
* Higher [[IPC]]
 
* Higher core count (from [[32-core]])
 
* ARMv8.2 support (from ARMv8)
 
* Multi-socket support
 
* Faster memory (3200 MT/s from 2666 MT/s)
 
* PCIe 4.0 support (from 3.0)
 
* [[CCIX]] connectivity support
 

Revision as of 12:58, 25 October 2018

codenameQuicksilver +
designerAmpere Computing +
first launched2019 +
full page nameampere computing/microarchitectures/quicksilver +
instance ofmicroarchitecture +
instruction set architectureARMv8.2 +
manufacturerTSMC +
microarchitecture typeCPU +
nameQuicksilver +
process7 nm (0.007 μm, 7.0e-6 mm) +