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− | <includeonly>{| style="border: solid 1px #e5e5ff; width: 275px; float: right; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;" | + | <includeonly>{{#Invoke: chip|chip}}</includeonly><noinclude>{{Module:chip/doc}} |
− | | style="text-align: center; background: #ecd9c6; font-size: 16px;" colspan="2" | '''{{{name}}}'''[[name::{{{name}}}| ]]
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− | {{#if:{{{no image|}}}|<div></div>|{{!-}}}} | |
− | {{#if:{{{no image|}}}|<div></div>|{{!}} style="text-align: center;" colspan="2" {{!}} {{#if:{{{image|}}}|[[File:{{{image}}}|{{#if:{{{image size|}}}|{{{image size}}}|200px}}]]|[[File:no photo (ic).svg|200px]]}}}}
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− | {{#if:{{{caption|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{caption|}}}|{{!}} style="text-align: center; font-size: 12px;" colspan="2" {{!}} {{{caption}}}|}}
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− | {{#if:{{{designer|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{designer|}}}|{{!}} '''Designer''' {{!}}{{!}} [[{{{designer}}}]][[designer::{{{designer}}}| ]][[category:microprocessor models by {{lc:{{{designer}}}}}]]|}}
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− | {{#if:{{{manufacturer|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{manufacturer|}}}|{{!}} '''Manufacturer''' {{!}}{{!}} [[{{{manufacturer}}}]][[manufacturer::{{{manufacturer}}}| ]][[category:microprocessor models by {{lc:{{{manufacturer}}}}}]]|}}
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− | {{#if:{{{model number|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{model number|}}}|{{!}} '''Model Number''' {{!}}{{!}} {{{model number}}}[[model number::{{{model number}}}| ]]|}}
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− | {{#if:{{{part number|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{part number|}}}|{{!}} '''Part Number''' {{!}}{{!}} {{{part number}}}{{comma2|{{{part number 1|}}}}}{{comma2|{{{part number 2|}}}}}{{comma2|{{{part number 3|}}}}}|}}
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− | {{#if:{{{market|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{market|}}}|{{!}} '''Market''' {{!}}{{!}} [[market segment::{{{market}}}]] |}}
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− | {{#if:{{{first launched|{{{first announced|}}}}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{first launched|{{{first announced|}}}}}}|{{!}} '''Introduction''' {{!}}{{!}} {{#if:{{{first announced|}}}|{{{first announced}}} (announced)|}}{{#if:{{{first launched|}}}|{{#if:{{{first announced|}}}|<br />}}{{{first launched}}} (launch)[[first launched::{{{first launched}}}| ]]|}}|}}
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− | {{#if:{{{last order|}}}{{{last shipment|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{last order|}}}{{{last shipment|}}}|{{!}} '''End-of-life''' {{!}}{{!}} {{#if:{{{last order|}}}|{{{last order}}} (last order)|}}<br />{{#if:{{{last shipment|}}}|{{{last shipment}}} (last shipment)|}}|}}
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− | |-
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− | | colspan="2" style="text-align: center;" | '''General information'''
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− | {{#if:{{{family|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{family|}}}|{{!}} '''Family''' {{!}}{{!}} {{{family}}}[[microprocessor family::{{{family}}}| ]]|}}
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− | {{#if:{{{series|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{series|}}}|{{!}} '''Series''' {{!}}{{!}} {{{series}}}[[microprocessor series::{{{series}}}| ]]|}}
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− | {{#if:{{{locked|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{locked|}}}|{{!}} '''Locked''' {{!}}{{!}} {{{locked}}}|}}
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− | {{#if:{{{frequency|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{frequency|}}}|{{!}} '''Frequency''' {{!}}{{!}} [[base frequency::{{{frequency}}}]]{{#if:{{{frequency 2|}}}|, [[base frequency::{{{frequency 2}}}]]}}{{#if:{{{frequency 3|}}}|, [[base frequency::{{{frequency 3}}}]]}}|}}
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− | {{#if:{{{turbo frequency|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{turbo frequency|}}}|{{!}} ''' Turbo frequency''' {{!}}{{!}} {{#if:{{{turbo frequency1|}}}|[[turbo frequency (1 core)::{{{turbo frequency1}}}]] (1 core)|}}{{#if:{{{turbo frequency2|}}}|<br />[[turbo frequency (2 cores)::{{{turbo frequency2}}}]] (2 cores)|}}{{#if:{{{turbo frequency3|}}}|<br />[[turbo frequency (3 cores)::{{{turbo frequency3}}}]] (3 cores)|}}{{#if:{{{turbo frequency4|}}}|<br />[[turbo frequency (4 cores)::{{{turbo frequency4}}}]] (4 cores)|}}{{#if:{{{turbo frequency5|}}}|<br />[[turbo frequency (5 cores)::{{{turbo frequency5}}}]] (5 cores)|}}{{#if:{{{turbo frequency6|}}}|<br />[[turbo frequency (6 cores)::{{{turbo frequency6}}}]] (6 cores)|}}{{#if:{{{turbo frequency7|}}}|<br />[[turbo frequency (7 cores)::{{{turbo frequency7}}}]] (7 cores)|}}{{#if:{{{turbo frequency8|}}}|<br />[[turbo frequency (8 cores)::{{{turbo frequency8}}}]] (8 cores)|}}{{#if:{{{turbo frequency9|}}}|<br />[[turbo frequency (9 cores)::{{{turbo frequency9}}}]] (9 cores)|}}{{#if:{{{turbo frequency10|}}}|<br />[[turbo frequency (10 cores)::{{{turbo frequency10}}}]] (10 cores)|}} |}}
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− | {{#if:{{{bus type|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{bus type|}}}|{{!}} '''Bus type''' {{!}}{{!}} [[bus type::{{{bus type}}}]]|}}
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− | {{#if:{{{bus speed|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{bus speed|}}}|{{!}} '''Bus speed''' {{!}}{{!}} [[base speed::{{{bus speed}}}]]|}}
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− | {{#if:{{{bus rate|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{bus rate|}}}|{{!}} '''Bus rate''' {{!}}{{!}} [[base rate::{{{bus rate}}}]]|}}
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− | {{#if:{{{clock multiplier|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{clock multiplier|}}}|{{!}} '''Clock multiplier''' {{!}}{{!}} [[clock multiplier::{{{clock multiplier}}}]]|}}
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− | {{#if:{{{s-spec|}}}{{{s-spec qs|}}}{{{s-spec es|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{s-spec|}}}{{{s-spec qs|}}}{{{s-spec es|}}}|{{!}} '''S-Spec''' {{!}}{{!}} {{#if:{{{s-spec|}}}|[[s-spec::{{{s-spec}}}]] (Production)}}{{#if:{{{s-spec 2|}}}|, [[s-spec::{{{s-spec 2}}}]] (Production)}}{{#if:{{{s-spec 3|}}}|, [[s-spec::{{{s-spec 3}}}]] (Production)}}{{comma2|{{#if:{{{s-spec qs|}}}|[[s-spec (qs)::{{{s-spec qs}}}]] ([[qualification sample|QS]])}}}}{{comma2|{{#if:{{{s-spec qs 2|}}}|[[s-spec (qs)::{{{s-spec qs 2}}}]] ([[qualification sample|QS]])}}}}{{comma2|{{#if:{{{s-spec es|}}}|[[s-spec (es)::{{{s-spec es}}}]] ([[engineering sample|ES]])}}}}{{comma2|{{#if:{{{s-spec es 2|}}}|[[s-spec (es)::{{{s-spec es 2}}}]] ([[engineering sample|ES]])}}}}|}}
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− | {{#if:{{{cpuid|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{cpuid|}}}|{{!}} '''CPUID''' {{!}}{{!}} [[cpuid::{{{cpuid}}}]]{{#if:{{{cpuid 2|}}}|, [[cpuid::{{{cpuid 2}}}]]}} |}}
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− | |-
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− | | colspan="2" style="text-align: center;" | '''Microarchitecture'''
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− | {{#if:{{{microarch|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{microarch|}}}|{{!}} '''Microarchitecture''' {{!}}{{!}} {{{microarch}}}[[microarchitecture::{{{microarch}}}| ]]|}}
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− | {{#if:{{{platform|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{platform|}}}|{{!}} '''Platform''' {{!}}{{!}} {{{platform}}}[[platform::{{{platform}}}| ]]|}}
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− | {{#if:{{{core name|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{core name|}}}|{{!}} '''Core name''' {{!}}{{!}} {{{core name}}}[[core name::{{{core name}}}| ]]|}}
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− | {{#if:{{{core family|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{core family|}}}|{{!}} '''Core family''' {{!}}{{!}} [[core family::{{{core family}}}]]{{#if:{{{core family 2|}}}|, [[core family::{{{core family 2}}}]]}}{{#if:{{{core family 3|}}}|, [[core family::{{{core family 3}}}]]}}{{#if:{{{core family 4|}}}|, [[core family::{{{core family 4}}}]]}}|}}
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− | {{#if:{{{core model|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{core model|}}}|{{!}} '''Core model''' {{!}}{{!}} [[core model::{{{core model}}}]]{{#if:{{{core model 2|}}}|, [[core model::{{{core model 2}}}]]}}{{#if:{{{core model 3|}}}|, [[core model::{{{core model 3}}}]]}}{{#if:{{{core model 4|}}}|, [[core model::{{{core model 4}}}]]}}|}}
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− | {{#if:{{{core stepping|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{core stepping|}}}|{{!}} '''Core stepping''' {{!}}{{!}} [[core stepping::{{{core stepping}}}]]{{#if:{{{core stepping 2|}}}|, [[core stepping::{{{core stepping 2}}}]]}}{{#if:{{{core stepping 3|}}}|, [[core stepping::{{{core stepping 3}}}]]}}{{#if:{{{core stepping 4|}}}|, [[core stepping::{{{core stepping 4}}}]]}}|}}
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− | {{#if:{{{process|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{process|}}}|{{!}} '''Process''' {{!}}{{!}} [[process::{{{process}}}]]{{#if:{{{process 2|}}}|, [[process::{{{process 2}}}]]}}|}}
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− | {{#if:{{{transistors|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{transistors|}}}|{{!}} '''Transistors''' {{!}}{{!}} {{{transistors}}}[[transistor count::{{{transistors}}}| ]]|}}
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− | {{#if:{{{technology|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{technology|}}}|{{!}} '''Technology''' {{!}}{{!}} {{{technology}}}[[technology::{{{technology}}}| ]]|}}
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− | {{#if:{{{die size|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{die size|}}}|{{!}} '''Die size''' {{!}}{{!}} {{{die size}}}|}}
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− | {{#if:{{{word size|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{word size|}}}|{{!}} '''Word size''' {{!}}{{!}} [[word size::{{{word size}}}]]|}}
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− | {{#if:{{{core count|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{core count|}}}|{{!}} '''Core count''' {{!}}{{!}} [[core count::{{{core count}}}]]|}}
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− | {{#if:{{{thread count|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{thread count|}}}|{{!}} '''Thread count''' {{!}}{{!}} [[thread count::{{{thread count}}}]]|}}
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− | {{#if:{{{max cpus|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{max cpus|}}}|{{!}} '''Max CPUs''' {{!}}{{!}} {{{max cpus}}}|}}
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− | {{#if:{{{max memory|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{max memory|}}}|{{!}} '''Max Memory''' {{!}}{{!}} [[max memory::{{{max memory}}}]]|}}
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− | {{#if:{{{max memory addr|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{max memory addr|}}}|{{!}} '''Max Addressable Memory''' {{!}}{{!}} {{{max memory addr}}}|}}
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− | {{#if:{{{electrical|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{electrical|}}}|{{!}} style="text-align: center; font-size: 12px;" colspan="2" {{!}} '''Electrical'''|}}
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− | {{#if:{{{power|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{power|}}}|{{!}} '''Power consumption''' {{!}}{{!}} {{{power}}}|}}
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− | {{#if:{{{v core|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{v core|}}}|{{!}} '''V<sub>core</sub>''' {{!}}{{!}} {{{v core}}} {{#if:{{{v core tolerance|}}}|± {{{v core tolerance}}}}}|}}
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− | {{#if:{{{power|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{power|}}}|{{!}} '''Power consumption''' {{!}}{{!}} {{{power}}}|}}
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− | {{#if:{{{sdp|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{sdp|}}}|{{!}} '''Scenario Design Power''' {{!}}{{!}} [[sdp::{{{sdp}}}]]|}}
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− | {{#if:{{{tdp|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{tdp|}}}|{{!}} '''Thermal Design Power''' {{!}}{{!}} [[tdp::{{{tdp}}}]]|}}
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− | {{#if:{{{ctdp down|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{ctdp down|}}}|{{!}} '''cTDP down''' {{!}}{{!}} [[tdp down::{{{ctdp down}}}]]|}}
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− | {{#if:{{{ctdp down frequency|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{ctdp down frequency|}}}|{{!}} '''cTDP down frequency''' {{!}}{{!}} [[tdp down frequency::{{{ctdp down frequency}}}]]|}}
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− | {{#if:{{{ctdp up|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{ctdp up|}}}|{{!}} '''cTDP up''' {{!}}{{!}} [[tdp up::{{{ctdp up}}}]]|}}
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− | {{#if:{{{ctdp up frequency|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{ctdp up frequency|}}}|{{!}} '''cTDP up frequency''' {{!}}{{!}} [[tdp up frequency::{{{ctdp up frequency}}}]]|}}
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− | {{#if:{{{temp max|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{temp max|}}}|{{!}} '''Maximum Op Temp''' {{!}}{{!}} {{{temp max}}}|}}
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− | {{#if:{{{temp min|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{temp min|}}}|{{!}} '''Minimum Op Temp''' {{!}}{{!}} {{{temp min}}}|}}
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− | {{#if:{{{packaging|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{packaging|}}}|{{!}} style="text-align: center; font-size: 12px;" colspan="2" {{!}} '''Packaging'''|}}
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− | {{#if:{{{package|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{package|}}}|{{!}} '''Package''' {{!}}{{!}} [[package::{{{package}}}]] {{#if:{{{package type|}}}|({{{package type}}})|}}{{#if:{{{package 1|}}}|, [[package::{{{package 1}}}]] {{#if:{{{package type 1|}}}|({{{package type 1}}})}}}}{{#if:{{{package 2|}}}|, [[package::{{{package 2}}}]] {{#if:{{{package type 2|}}}|({{{package type 2}}})}}}}{{#if:{{{package 3|}}}|, [[package::{{{package 3}}}]] {{#if:{{{package type 3|}}}|({{{package type 3}}})}}}}{{#if:{{{package 4|}}}|, [[package::{{{package 4}}}]] {{#if:{{{package type 4|}}}|({{{package type 4}}})}}}}{{#if:{{{package 5|}}}|, [[package::{{{package 5}}}]] {{#if:{{{package type 5|}}}|({{{package type 5}}})}}}}{{#if:{{{package 6|}}}|, [[package::{{{package 6}}}]] {{#if:{{{package type 6|}}}|({{{package type 6}}})}}}} |}}
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− | {{#if:{{{package pitch|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{package pitch|}}}|{{!}} '''Pitch''' {{!}}{{!}} {{{package pitch}}}|}}
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− | {{#if:{{{package size|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{package size|}}}|{{!}} '''Dimension''' {{!}}{{!}} {{{package size}}}|}}
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− | {{#if:{{{socket|}}}|{{!-}}|<div></div>}}
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− | {{#if:{{{socket|}}}|{{!}} '''Socket''' {{!}}{{!}} [[socket::{{{socket}}}]] {{#if:{{{socket type|}}}|({{{socket type}}})|}}{{#if:{{{socket 1|}}}|, [[socket::{{{socket 1}}}]] {{#if:{{{socket type 1|}}}|({{{socket type 1}}})}}}}{{#if:{{{socket 2|}}}|, [[socket::{{{socket 2}}}]] {{#if:{{{socket type 2|}}}|({{{socket type 2}}})}}}}{{#if:{{{socket 3|}}}|, [[socket::{{{socket 3}}}]] {{#if:{{{socket type 3|}}}|({{{socket type 3}}})}}}}{{#if:{{{socket 4|}}}|, [[socket::{{{socket 4}}}]] {{#if:{{{socket type 4|}}}|({{{socket type 4}}})}}}}{{#if:{{{socket 5|}}}|, [[socket::{{{socket 5}}}]] {{#if:{{{socket type 5|}}}|({{{socket type 5}}})}}}}{{#if:{{{socket 6|}}}|, [[socket::{{{socket 6}}}]] {{#if:{{{socket type 6|}}}|({{{socket type 6}}})}}}} |}}
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− | |}[[Category:all microprocessor models]][[full page name::{{FULLPAGENAME}}| ]][[instance of::microprocessor| ]]</includeonly><noinclude>{{documentation}}
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| </noinclude> | | </noinclude> |