Difference between revisions of "intel/core i5/i5-7y54"

	Edit Values
	Core i5-7Y54
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	i5-7Y54
Part Number	HE8067702739826
S-Spec	SR2ZX, SR345
Market	Mobile
Introduction	August 30, 2016 (announced); August 30, 2016 (launched)
Release Price	$281.00
Shop	Amazon
	General Specs
Family	Core i5
Series	i5-7Y
Locked	Yes
Frequency	1,200 MHz
Turbo Frequency	Yes
Turbo Frequency	3,200 MHz (1 core)
Bus type	OPI
Bus rate	4 GT/s
Clock multiplier	12
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Kaby Lake
Platform	Kaby Lake
Core Name	Kaby Lake Y
Core Family	6
Core Model	142
Core Stepping	H0
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	2
Threads	4
Max Memory	16 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
Vcore	0.55 V-1.52 V
TDP	4.5 W
cTDP down	3.5 W
cTDP down frequency	600 MHz
cTDP up	7 W
cTDP up frequency	1,600 MHz
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
	Packaging
Package	FCBGA-1515 (BGA)
Dimension	20 mm × 16.5 mm × 0.5 mm
Pitch	0.4 mm
Contacts	1515

Latest revision as of 17:04, 28 August 2018

Core i5-7Y54 is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by Intel in mid-2016. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a Turbo Boost frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's HD Graphics 615 IGP operating at 300 MHz with a burst frequency of 950 MHz.

This specific model has a configurable TDP-down of 3.5 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz.

Cache[edit]

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

128 KiB

131,072 B
0.125 MiB

L1I$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative	write-back

L2$

512 KiB

0.5 MiB
524,288 B
4.882812e-4 GiB

		2x256 KiB	4-way set associative	write-back

L3$

4 MiB

4,096 KiB
4,194,304 B
0.00391 GiB

		2x2 MiB	12-way set associative	write-back

Memory controller[edit]

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR3L-1600, LPDDR3-1866
Supports ECC	No
Max Mem	16 GiB
Controllers	1
Channels	2
Max Bandwidth	27.81 GiB/s 28,477.44 MiB/s 29.861 GB/s 29,860.76 MB/s 0.0272 TiB/s 0.0299 TB/s
Bandwidth	Single 13.9 GiB/s Double 27.81 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	3.0
Max Lanes	10
Configs	1x4, 2x2, 1x2+2x1, 4x1

Graphics[edit]

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

HD Graphics 615

Designer

Intel

Device ID

0x591E

Execution Units

24

Max Displays

3

Max Memory

16 GiB

16,384 MiB
16,777,216 KiB
17,179,869,184 B

Frequency

300 MHz

0.3 GHz
300,000 KHz

Burst Frequency

950 MHz

0.95 GHz
950,000 KHz

Output

DP, eDP, HDMI, DVI

Max Resolution

HDMI	4096x2304 @24 Hz
DP	4096x2304 @60 Hz
eDP	4096x2304 @60 Hz

Standards

DirectX	12
OpenGL	4.4
OpenCL	2.0
DP	1.2
eDP	1.4
HDMI	1.4a

Additional Features

Intel Quick Sync Video

Intel InTru 3D

Intel Clear Video

Intel Clear Video HD

[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities
Codec	Encode			Decode
Codec	Profiles	Levels	Max Resolution	Profiles	Levels	Max Resolution
MPEG-2 (H.262)	Main	High	1080p (FHD)	Main	Main, High	1080p (FHD)
MPEG-4 AVC (H.264)	High, Main	5.1	2160p (4K)	Main, High, MVC, Stereo	5.1	2160p (4K)
JPEG/MJPEG	Baseline	-	16k x 16k	Baseline	Unified	16k x 16k
HEVC (H.265)	Main, Main 10	5.1	2160p (4K)	Main, Main 10	5.1	2160p (4K)
VC-1	✘			Advanced, Main, Simple	3, High, Simple	3840x3840
VP8	Unified	Unified	N/A	0	Unified	1080p
VP9	0		2160p (4K)	0, 2	Unified	2160p (4K)

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
SSE4a	Streaming SIMD Extensions 4a
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
HT	Hyper-Threading
TBT 2.0	Turbo Boost Technology 2.0
EIST	Enhanced SpeedStep Technology
SST	Speed Shift Technology
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
MPX	Memory Protection Extensions
SGX	Software Guard Extensions
Secure Key	Secure Key Technology
SMEP	OS Guard Technology
Flex Memory	Flex Memory Access
ISRT	Smart Response Technology
MWT	My WiFi Technology

@@ Line 1: / Line 1: @@
 {{intel title|Core i5-7Y54}}
-{{mpu
+{{chip
-| name                = Core i5-7Y54
+|name=Core i5-7Y54
-| no image            = Yes
+|image=kaby lake y (front).png
-| image               =
+|image size=250px
-| image size          =
+|designer=Intel
-| caption             =
+|manufacturer=Intel
-| designer            = Intel
+|model number=i5-7Y54
-| manufacturer        = Intel
+|part number=HE8067702739826
-| model number        = i5-7Y54
+|s-spec=SR2ZX
-| part number         = HE8067702739826
+|s-spec 2=SR345
-| part number 1       =
+|market=Mobile
-| part number 2       =
+|first announced=August 30, 2016
-| s-spec              = SR2ZX
+|first launched=August 30, 2016
-| market              = Mobile
+|release price=$281.00
-| first announced     = August 30, 2016
+|family=Core i5
-| first launched      = August 30, 2016
+|series=i5-7Y
-| last order          =
+|locked=Yes
-| last shipment       =
+|frequency=1,200 MHz
-| release price       = $281.00
+|turbo frequency1=3,200 MHz
+|turbo frequency=Yes
-| family              = Core i5
+|bus type=OPI
-| series              = i5-7Y
+|bus rate=4 GT/s
-| locked              = Yes
+|clock multiplier=12
-| frequency           = 1,200 MHz
+|isa=x86-64
-| turbo frequency     = Yes
+|isa family=x86
-| turbo frequency1    = 3,200 MHz
+|microarch=Kaby Lake
-| turbo frequency2    =
+|platform=Kaby Lake
-| turbo frequency3    =
+|core name=Kaby Lake Y
-| turbo frequency4    =
+|core family=6
-| bus type            = OPI
+|core model=142
-| bus speed           =
+|core stepping=H0
-| bus rate            = 4 GT/s
+|process=14 nm
-| bus links           =
+|technology=CMOS
-| clock multiplier    = 12
+|word size=64 bit
-| cpuid               =
+|core count=2
+|thread count=4
-| isa family          = x86
+|max cpus=1
-| isa                 = x86-64
+|max memory=16 GiB
-| microarch           = Kaby Lake
+|v core min=0.55 V
-| platform            = Kaby Lake
+|v core max=1.52 V
-| chipset             =
+|tdp=4.5 W
-| core name           = Kaby Lake Y
+|ctdp down=3.5 W
-| core family         = 6
+|ctdp down frequency=600 MHz
-| core model          = 142
+|ctdp up=7 W
-| core stepping       = H0
+|ctdp up frequency=1,600 MHz
-| core stepping 2     =
+|tjunc min=0 °C
-| process             = 14 nm
+|tjunc max=100 °C
-| transistors         =
+|tstorage min=-25 °C
-| technology          = CMOS
+|tstorage max=125 °C
-| die area            =
+|package name 1=intel,fcbga_1515
-| die width           =
-| die length          =
-| word size           = 64 bit
-| core count          = 2
-| thread count        = 4
-| max cpus            = 1
-| max memory          = 16 GiB
-| electrical          = Yes
-| v core min          = 0.55 V
-| v core max          = 1.52 V
-| sdp                 =
-| tdp                 = 4.5 W
-| tdp typical         =
-| ctdp down           = 3.5 W
-| ctdp down frequency = 600 MHz
-| ctdp up             = 7 W
-| ctdp up frequency   = 1,600 MHz
-| tjunc min           = 0 °C
-| tjunc max           = 100 °C
-| tcase min           =
-| tcase max           =
-| tstorage min        = -25 °C
-| tstorage max        = 125 °C
-| tambient min        =
-| tambient max        =
-| packaging           = Yes
-| package 0           = FCBGA-1515
-| package 0 type      = FCBGA
-| package 0 pins      = 1515
-| package 0 pitch     = 0.4 mm
-| package 0 width     = 20 mm
-| package 0 length    = 16.5 mm
-| package 0 height    =
-| socket 0            = BGA-1515
-| socket 0 type       = BGA
 }}
-'''Core i5-7Y54''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 950 MHz.
+'''Core i5-7Y54''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 950 MHz.
+This specific model has a configurable TDP-down of 3.5 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz.
 == Cache ==
 {{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
@@ Line 97: / Line 61: @@
 |l1i break=2x32 KiB
 |l1i desc=8-way set associative
-|l1i policy=write-back
 |l1d cache=64 KiB
 |l1d break=2x32 KiB
@@ Line 204: / Line 167: @@
 |avx=Yes
 |avx2=Yes
-|avx512=No
 |abm=Yes
 |tbm=No

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i5-7Y54 - Intel#io +
base frequency	1,200 MHz (1.2 GHz, 1,200,000 kHz) +
bus rate	4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus type	OPI +
clock multiplier	12 +
core count	2 +
core family	6 +
core model	142 +
core name	Kaby Lake Y +
core stepping	H0 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x591E +
family	Core i5 +
first announced	August 30, 2016 +
first launched	August 30, 2016 +
full page name	intel/core i5/i5-7y54 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology + and My WiFi Technology +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel my wifi technology support	true +
has intel secure key technology	true +
has intel smart response technology support	true +
has intel speed shift technology	true +
has intel supervisor mode execution protection	true +
has intel turbo boost technology 2 0	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 615 +
integrated gpu base frequency	300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	24 +
integrated gpu max frequency	950 MHz (0.95 GHz, 950,000 KHz) +
integrated gpu max memory	16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	4-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description	12-way set associative +
l3$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldate	August 30, 2016 +
main image	+
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth	27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) +
max memory channels	2 +
max pcie lanes	10 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Kaby Lake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i5-7Y54 +
name	Core i5-7Y54 +
package	FCBGA-1515 +
part number	HE8067702739826 +
platform	Kaby Lake +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) +
s-spec	SR2ZX + and SR345 +
series	i5-7Y +
smp max ways	1 +
supported memory type	DDR3L-1600 + and LPDDR3-1866 +
tdp	4.5 W (4,500 mW, 0.00603 hp, 0.0045 kW) +
tdp down	3.5 W (3,500 mW, 0.00469 hp, 0.0035 kW) +
tdp down frequency	600 MHz (0.6 GHz, 600,000 kHz) +
tdp up	7 W (7,000 mW, 0.00939 hp, 0.007 kW) +
tdp up frequency	1,600 MHz (1.6 GHz, 1,600,000 kHz) +
technology	CMOS +
thread count	4 +
turbo frequency (1 core)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Latest revision as of 17:04, 28 August 2018

Contents

Cache[edit]

Memory controller[edit]

Expansions[edit]

Graphics[edit]

Features[edit]