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Difference between revisions of "intel/microarchitectures/alder lake"
< intel | microarchitectures
| Line 7: | Line 7: | ||
|introduction=2021 | |introduction=2021 | ||
|process=7 nm | |process=7 nm | ||
| + | |predecessor=Tiger Lake | ||
| + | |predecessor link=intel/microarchitectures/tiger lake | ||
|successor=Meteor Lake | |successor=Meteor Lake | ||
|successor link=intel/microarchitectures/meteor lake | |successor link=intel/microarchitectures/meteor lake | ||
}} | }} | ||
Revision as of 22:50, 5 April 2018
| Edit Values | |
| Alder Lake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2021 |
| Process | 7 nm |
| Succession | |
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/alder_lake&oldid=76736"
Facts about "Alder Lake - Microarchitectures - Intel"
| codename | Alder Lake + |
| designer | Intel + |
| first launched | 2021 + |
| full page name | intel/microarchitectures/alder lake + |
| instance of | microarchitecture + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Alder Lake + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |