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Difference between revisions of "ampere computing/microarchitectures/quicksilver"
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{{ampere title|Shadowcat|arch}} | {{ampere title|Shadowcat|arch}} | ||
| − | {{microarchitecture}} | + | {{microarchitecture |
| + | |atype=CPU | ||
| + | |name=Quicksilver | ||
| + | |designer=Ampere Computing | ||
| + | |manufacturer=TSMC | ||
| + | |introduction=2019 | ||
| + | |process=7 nm | ||
| + | |type=Superscalar | ||
| + | |oooe=Yes | ||
| + | |speculative=Yes | ||
| + | |renaming=Yes | ||
| + | |isa=ARMv8.2 | ||
| + | |predecessor=Skylark | ||
| + | |predecessor link=apm/microarchitectures/skylark | ||
| + | }} | ||
Revision as of 02:39, 9 February 2018
| Edit Values | |
| Quicksilver µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Ampere Computing |
| Manufacturer | TSMC |
| Introduction | 2019 |
| Process | 7 nm |
| Pipeline | |
| Type | Superscalar |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Instructions | |
| ISA | ARMv8.2 |
| Succession | |
Facts about "Quicksilver - Microarchitectures - Ampere"
| codename | Quicksilver + |
| designer | Ampere Computing + |
| first launched | 2019 + |
| full page name | ampere computing/microarchitectures/quicksilver + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8.2 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Quicksilver + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |