Revision as of 18:40, 6 January 2018

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Core i5-8305G
Package front
General Info
Designer	Intel, AMD
Manufacturer	Intel, GlobalFoundries
Model Number	i5-8305G
Market	Mobile
Introduction	January 7, 2018 (announced) January 7, 2018 (launched)
Shop	Amazon
General Specs
Family	Core i5
Series	i5-8000
Locked	Yes
Frequency	2,800 MHz
Turbo Frequency	3,800 MHz (1 core)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
Clock multiplier	28
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Kaby Lake
Platform	Kaby Lake
Chipset	Sunrise Point, Union Point
Core Name	Kaby Lake G
Core Family	6
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	4
Threads	8
Max Memory	64 GiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)

Core i5-8305G is a 64-bit quad-core mid-rage performance x86 mobile microprocessor introduced by Intel in early 2018. This processor, which is based on the Kaby Lake microarchitecture, is manufactured on Intel's improved 14nm+ process. The i5-8305G operates at 2.8 GHz and a Turbo Boost frequency of up to 3.8 GHz. This MPU supports up to 64 GiB of dual-channel DDR4-2400 memory and incorporates Intel's HD Graphics 630 IGP operating at 350 MHz with a burst frequency of 1.1 GHz. Additionally, this processor also incorporates a discrete Radeon RX Vega M GL GPU with its own 4 GiB of high-bandwidth memory.

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 256 KiB 262,144 B 0.25 MiB L1I$ 128 KiB 131,072 B 0.125 MiB 4x32 KiB 8-way set associative   L1D$ 128 KiB 131,072 B 0.125 MiB 4x32 KiB 8-way set associative write-back L2$ 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB     4x256 KiB 4-way set associative write-back L3$ 6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB     4x1.5 MiB 12-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3L-1600, DDR4-2400 Supports ECC No Max Mem 64 GiB Controllers 1 Channels 2 Max Bandwidth 35.76 GiB/s 36,618.24 MiB/s 38.397 GB/s 38,397.008 MB/s 0.0349 TiB/s 0.0384 TB/s Bandwidth Single 17.88 GiB/s Double 35.76 GiB/s

HBM 2

This processor also incorporates 4 GiB of high-bandwidth memory 2 which are tightly connected to the GPU via Intel's EMIB.

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type HBM2 Max Mem 4 GiB Width 1,024 bit

Expansions

This processor has 16 PCIe lanes, however 8x of them are taken for the discrete GPU, leaving 8x more for general purpose.

[Edit/Modify Expansions Info]

	Expansion Options
PCIe Revision: 3.0 Max Lanes: 8 Configuration: x8, x4