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Difference between revisions of "andes"
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* {{andes|N13|l=arch}} | * {{andes|N13|l=arch}} | ||
* {{andes|N15|l=arch}} | * {{andes|N15|l=arch}} | ||
| + | * {{andes|N25|l=arch}} | ||
| + | * {{andes|X25|l=arch}} | ||
== Architectures == | == Architectures == | ||
Latest revision as of 12:37, 25 December 2017
| Andes | |
| |
| Type | Private |
| Founded | 2005 Hsinchu Science Park, Taiwan |
| Headquarters | Hsinchu Science Park, Taiwan |
| Website | http://www.andestech.com |
Andes Technology is a Taiwanese fabless semiconductor company that designs and licenses IP cores based on their own in-house developed AndeStar RISC architecture. Most recently, Andes has entered the RISC-V market.
List of microarchitecture[edit]
AndesCore:
Architectures[edit]
Retrieved from "https://en.wikichip.org/w/index.php?title=andes&oldid=71554"
Facts about "Andes"
| company type | private + |
| founded | 2005 + |
| founded location | Hsinchu Science Park, Taiwan + |
| full page name | andes + |
| headquarters | Hsinchu Science Park, Taiwan + |
| instance of | semiconductor company + |
| name | Andes + |
| website | http://www.andestech.com + |